git.piffa.net Git - arduino/blob - sheets/gyro/GY-52 Three-axis gyroscope sending data /Three-axis gyroscope sending data/GY-52 Test program/STM32-CODE/serial port output MPU-3050/serial/Libraries/CMSIS/Core/CM3/startup/arm/startup_stm32f10x_cl.s

   1 ;******************** (C) COPYRIGHT 2009 STMicroelectronics ********************\r
   2 ;* File Name          : startup_stm32f10x_cl.s\r
   3 ;* Author             : MCD Application Team\r
   4 ;* Version            : V3.1.2\r
   5 ;* Date               : 09/28/2009\r
   6 ;* Description        : STM32F10x Connectivity line devices vector table for RVMDK \r
   7 ;*                      toolchain. \r
   8 ;*                      This module performs:\r
   9 ;*                      - Set the initial SP\r
  10 ;*                      - Set the initial PC == Reset_Handler\r
  11 ;*                      - Set the vector table entries with the exceptions ISR address\r
  12 ;*                      - Branches to __main in the C library (which eventually\r
  13 ;*                        calls main()).\r
  14 ;*                      After Reset the CortexM3 processor is in Thread mode,\r
  15 ;*                      priority is Privileged, and the Stack is set to Main.\r
  16 ;* <<< Use Configuration Wizard in Context Menu >>>   \r
  17 ;*******************************************************************************\r
  18 ; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS\r
  19 ; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.\r
  20 ; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,\r
  21 ; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE\r
  22 ; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING\r
  23 ; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.\r
  24 ;*******************************************************************************\r
  25 \r
  26 ; Amount of memory (in bytes) allocated for Stack\r
  27 ; Tailor this value to your application needs\r
  28 ; <h> Stack Configuration\r
  29 ;   <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
  30 ; </h>\r
  31 \r
  32 Stack_Size      EQU     0x00000400\r
  33 \r
  34                 AREA    STACK, NOINIT, READWRITE, ALIGN=3\r
  35 Stack_Mem       SPACE   Stack_Size\r
  36 __initial_sp\r
  37 \r
  38 \r
  39 ; <h> Heap Configuration\r
  40 ;   <o>  Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>\r
  41 ; </h>\r
  42 \r
  43 Heap_Size       EQU     0x00000200\r
  44 \r
  45                 AREA    HEAP, NOINIT, READWRITE, ALIGN=3\r
  46 __heap_base\r
  47 Heap_Mem        SPACE   Heap_Size\r
  48 __heap_limit\r
  49 \r
  50                 PRESERVE8\r
  51                 THUMB\r
  52 \r
  53 \r
  54 ; Vector Table Mapped to Address 0 at Reset\r
  55                 AREA    RESET, DATA, READONLY\r
  56                 EXPORT  __Vectors\r
  57                 EXPORT  __Vectors_End\r
  58                 EXPORT  __Vectors_Size\r
  59 \r
  60 __Vectors       DCD     __initial_sp              ; Top of Stack\r
  61                 DCD     Reset_Handler             ; Reset Handler\r
  62                 DCD     NMI_Handler               ; NMI Handler\r
  63                 DCD     HardFault_Handler         ; Hard Fault Handler\r
  64                 DCD     MemManage_Handler         ; MPU Fault Handler\r
  65                 DCD     BusFault_Handler          ; Bus Fault Handler\r
  66                 DCD     UsageFault_Handler        ; Usage Fault Handler\r
  67                 DCD     0                         ; Reserved\r
  68                 DCD     0                         ; Reserved\r
  69                 DCD     0                         ; Reserved\r
  70                 DCD     0                         ; Reserved\r
  71                 DCD     SVC_Handler               ; SVCall Handler\r
  72                 DCD     DebugMon_Handler          ; Debug Monitor Handler\r
  73                 DCD     0                         ; Reserved\r
  74                 DCD     PendSV_Handler            ; PendSV Handler\r
  75                 DCD     SysTick_Handler           ; SysTick Handler\r
  76 \r
  77                 ; External Interrupts\r
  78                 DCD     WWDG_IRQHandler            ; Window Watchdog\r
  79                 DCD     PVD_IRQHandler             ; PVD through EXTI Line detect\r
  80                 DCD     TAMPER_IRQHandler          ; Tamper\r
  81                 DCD     RTC_IRQHandler             ; RTC\r
  82                 DCD     FLASH_IRQHandler           ; Flash\r
  83                 DCD     RCC_IRQHandler             ; RCC\r
  84                 DCD     EXTI0_IRQHandler           ; EXTI Line 0\r
  85                 DCD     EXTI1_IRQHandler           ; EXTI Line 1\r
  86                 DCD     EXTI2_IRQHandler           ; EXTI Line 2\r
  87                 DCD     EXTI3_IRQHandler           ; EXTI Line 3\r
  88                 DCD     EXTI4_IRQHandler           ; EXTI Line 4\r
  89                 DCD     DMA1_Channel1_IRQHandler   ; DMA1 Channel 1\r
  90                 DCD     DMA1_Channel2_IRQHandler   ; DMA1 Channel 2\r
  91                 DCD     DMA1_Channel3_IRQHandler   ; DMA1 Channel 3\r
  92                 DCD     DMA1_Channel4_IRQHandler   ; DMA1 Channel 4\r
  93                 DCD     DMA1_Channel5_IRQHandler   ; DMA1 Channel 5\r
  94                 DCD     DMA1_Channel6_IRQHandler   ; DMA1 Channel 6\r
  95                 DCD     DMA1_Channel7_IRQHandler   ; DMA1 Channel 7\r
  96                 DCD     ADC1_2_IRQHandler          ; ADC1 and ADC2\r
  97                 DCD     CAN1_TX_IRQHandler         ; CAN1 TX\r
  98                 DCD     CAN1_RX0_IRQHandler        ; CAN1 RX0\r
  99                 DCD     CAN1_RX1_IRQHandler        ; CAN1 RX1\r
 100                 DCD     CAN1_SCE_IRQHandler        ; CAN1 SCE\r
 101                 DCD     EXTI9_5_IRQHandler         ; EXTI Line 9..5\r
 102                 DCD     TIM1_BRK_IRQHandler        ; TIM1 Break\r
 103                 DCD     TIM1_UP_IRQHandler         ; TIM1 Update\r
 104                 DCD     TIM1_TRG_COM_IRQHandler    ; TIM1 Trigger and Commutation\r
 105                 DCD     TIM1_CC_IRQHandler         ; TIM1 Capture Compare\r
 106                 DCD     TIM2_IRQHandler            ; TIM2\r
 107                 DCD     TIM3_IRQHandler            ; TIM3\r
 108                 DCD     TIM4_IRQHandler            ; TIM4\r
 109                 DCD     I2C1_EV_IRQHandler         ; I2C1 Event\r
 110                 DCD     I2C1_ER_IRQHandler         ; I2C1 Error\r
 111                 DCD     I2C2_EV_IRQHandler         ; I2C2 Event\r
 112                 DCD     I2C2_ER_IRQHandler         ; I2C1 Error\r
 113                 DCD     SPI1_IRQHandler            ; SPI1\r
 114                 DCD     SPI2_IRQHandler            ; SPI2\r
 115                 DCD     USART1_IRQHandler          ; USART1\r
 116                 DCD     USART2_IRQHandler          ; USART2\r
 117                 DCD     USART3_IRQHandler          ; USART3\r
 118                 DCD     EXTI15_10_IRQHandler       ; EXTI Line 15..10\r
 119                 DCD     RTCAlarm_IRQHandler        ; RTC alarm through EXTI line\r
 120                 DCD     OTG_FS_WKUP_IRQHandler     ; USB OTG FS Wakeup through EXTI line\r
 121                 DCD     0                          ; Reserved\r
 122                 DCD     0                          ; Reserved\r
 123                 DCD     0                          ; Reserved\r
 124                 DCD     0                          ; Reserved\r
 125                 DCD     0                          ; Reserved\r
 126                 DCD     0                          ; Reserved\r
 127                 DCD     0                          ; Reserved\r
 128                 DCD     TIM5_IRQHandler            ; TIM5\r
 129                 DCD     SPI3_IRQHandler            ; SPI3\r
 130                 DCD     UART4_IRQHandler           ; UART4\r
 131                 DCD     UART5_IRQHandler           ; UART5\r
 132                 DCD     TIM6_IRQHandler            ; TIM6\r
 133                 DCD     TIM7_IRQHandler            ; TIM7\r
 134                 DCD     DMA2_Channel1_IRQHandler   ; DMA2 Channel1\r
 135                 DCD     DMA2_Channel2_IRQHandler   ; DMA2 Channel2\r
 136                 DCD     DMA2_Channel3_IRQHandler   ; DMA2 Channel3\r
 137                 DCD     DMA2_Channel4_IRQHandler   ; DMA2 Channel4\r
 138                 DCD     DMA2_Channel5_IRQHandler   ; DMA2 Channel5\r
 139                 DCD     ETH_IRQHandler             ; Ethernet\r
 140                 DCD     ETH_WKUP_IRQHandler        ; Ethernet Wakeup through EXTI line\r
 141                 DCD     CAN2_TX_IRQHandler         ; CAN2 TX\r
 142                 DCD     CAN2_RX0_IRQHandler        ; CAN2 RX0\r
 143                 DCD     CAN2_RX1_IRQHandler        ; CAN2 RX1\r
 144                 DCD     CAN2_SCE_IRQHandler        ; CAN2 SCE\r
 145                 DCD     OTG_FS_IRQHandler          ; USB OTG FS\r
 146 __Vectors_End\r
 147 \r
 148 __Vectors_Size  EQU  __Vectors_End - __Vectors\r
 149 \r
 150                 AREA    |.text|, CODE, READONLY\r
 151 \r
 152 ; Reset handler routine\r
 153 Reset_Handler    PROC\r
 154                  EXPORT  Reset_Handler             [WEAK]\r
 155         IMPORT  __main\r
 156                  LDR     R0, =__main\r
 157                  BX      R0\r
 158                  ENDP\r
 159 \r
 160 ; Dummy Exception Handlers (infinite loops which can be modified)\r
 161 \r
 162 NMI_Handler     PROC\r
 163                 EXPORT  NMI_Handler                [WEAK]\r
 164                 B       .\r
 165                 ENDP\r
 166 HardFault_Handler\\r
 167                 PROC\r
 168                 EXPORT  HardFault_Handler          [WEAK]\r
 169                 B       .\r
 170                 ENDP\r
 171 MemManage_Handler\\r
 172                 PROC\r
 173                 EXPORT  MemManage_Handler          [WEAK]\r
 174                 B       .\r
 175                 ENDP\r
 176 BusFault_Handler\\r
 177                 PROC\r
 178                 EXPORT  BusFault_Handler           [WEAK]\r
 179                 B       .\r
 180                 ENDP\r
 181 UsageFault_Handler\\r
 182                 PROC\r
 183                 EXPORT  UsageFault_Handler         [WEAK]\r
 184                 B       .\r
 185                 ENDP\r
 186 SVC_Handler     PROC\r
 187                 EXPORT  SVC_Handler                [WEAK]\r
 188                 B       .\r
 189                 ENDP\r
 190 DebugMon_Handler\\r
 191                 PROC\r
 192                 EXPORT  DebugMon_Handler           [WEAK]\r
 193                 B       .\r
 194                 ENDP\r
 195 PendSV_Handler  PROC\r
 196                 EXPORT  PendSV_Handler             [WEAK]\r
 197                 B       .\r
 198                 ENDP\r
 199 SysTick_Handler PROC\r
 200                 EXPORT  SysTick_Handler            [WEAK]\r
 201                 B       .\r
 202                 ENDP\r
 203 \r
 204 Default_Handler PROC\r
 205 \r
 206                 EXPORT  WWDG_IRQHandler            [WEAK]\r
 207                 EXPORT  PVD_IRQHandler             [WEAK]\r
 208                 EXPORT  TAMPER_IRQHandler          [WEAK]\r
 209                 EXPORT  RTC_IRQHandler             [WEAK]\r
 210                 EXPORT  FLASH_IRQHandler           [WEAK]\r
 211                 EXPORT  RCC_IRQHandler             [WEAK]\r
 212                 EXPORT  EXTI0_IRQHandler           [WEAK]\r
 213                 EXPORT  EXTI1_IRQHandler           [WEAK]\r
 214                 EXPORT  EXTI2_IRQHandler           [WEAK]\r
 215                 EXPORT  EXTI3_IRQHandler           [WEAK]\r
 216                 EXPORT  EXTI4_IRQHandler           [WEAK]\r
 217                 EXPORT  DMA1_Channel1_IRQHandler   [WEAK]\r
 218                 EXPORT  DMA1_Channel2_IRQHandler   [WEAK]\r
 219                 EXPORT  DMA1_Channel3_IRQHandler   [WEAK]\r
 220                 EXPORT  DMA1_Channel4_IRQHandler   [WEAK]\r
 221                 EXPORT  DMA1_Channel5_IRQHandler   [WEAK]\r
 222                 EXPORT  DMA1_Channel6_IRQHandler   [WEAK]\r
 223                 EXPORT  DMA1_Channel7_IRQHandler   [WEAK]\r
 224                 EXPORT  ADC1_2_IRQHandler          [WEAK]\r
 225                 EXPORT  CAN1_TX_IRQHandler         [WEAK]\r
 226                 EXPORT  CAN1_RX0_IRQHandler        [WEAK]\r
 227                 EXPORT  CAN1_RX1_IRQHandler        [WEAK]\r
 228                 EXPORT  CAN1_SCE_IRQHandler        [WEAK]\r
 229                 EXPORT  EXTI9_5_IRQHandler         [WEAK]\r
 230                 EXPORT  TIM1_BRK_IRQHandler        [WEAK]\r
 231                 EXPORT  TIM1_UP_IRQHandler         [WEAK]\r
 232                 EXPORT  TIM1_TRG_COM_IRQHandler    [WEAK]\r
 233                 EXPORT  TIM1_CC_IRQHandler         [WEAK]\r
 234                 EXPORT  TIM2_IRQHandler            [WEAK]\r
 235                 EXPORT  TIM3_IRQHandler            [WEAK]\r
 236                 EXPORT  TIM4_IRQHandler            [WEAK]\r
 237                 EXPORT  I2C1_EV_IRQHandler         [WEAK]\r
 238                 EXPORT  I2C1_ER_IRQHandler         [WEAK]\r
 239                 EXPORT  I2C2_EV_IRQHandler         [WEAK]\r
 240                 EXPORT  I2C2_ER_IRQHandler         [WEAK]\r
 241                 EXPORT  SPI1_IRQHandler            [WEAK]\r
 242                 EXPORT  SPI2_IRQHandler            [WEAK]\r
 243                 EXPORT  USART1_IRQHandler          [WEAK]\r
 244                 EXPORT  USART2_IRQHandler          [WEAK]\r
 245                 EXPORT  USART3_IRQHandler          [WEAK]\r
 246                 EXPORT  EXTI15_10_IRQHandler       [WEAK]\r
 247                 EXPORT  RTCAlarm_IRQHandler        [WEAK]\r
 248                 EXPORT  OTG_FS_WKUP_IRQHandler     [WEAK]\r
 249                 EXPORT  TIM5_IRQHandler            [WEAK]\r
 250                 EXPORT  SPI3_IRQHandler            [WEAK]\r
 251                 EXPORT  UART4_IRQHandler           [WEAK]\r
 252                 EXPORT  UART5_IRQHandler           [WEAK]\r
 253                 EXPORT  TIM6_IRQHandler            [WEAK]\r
 254                 EXPORT  TIM7_IRQHandler            [WEAK]\r
 255                 EXPORT  DMA2_Channel1_IRQHandler   [WEAK]\r
 256                 EXPORT  DMA2_Channel2_IRQHandler   [WEAK]\r
 257                 EXPORT  DMA2_Channel3_IRQHandler   [WEAK]\r
 258                 EXPORT  DMA2_Channel4_IRQHandler   [WEAK]\r
 259                 EXPORT  DMA2_Channel5_IRQHandler   [WEAK]\r
 260                 EXPORT  ETH_IRQHandler             [WEAK]\r
 261                 EXPORT  ETH_WKUP_IRQHandler        [WEAK]\r
 262                 EXPORT  CAN2_TX_IRQHandler         [WEAK]\r
 263                 EXPORT  CAN2_RX0_IRQHandler        [WEAK]\r
 264                 EXPORT  CAN2_RX1_IRQHandler        [WEAK]\r
 265                 EXPORT  CAN2_SCE_IRQHandler        [WEAK]\r
 266                 EXPORT  OTG_FS_IRQHandler          [WEAK]\r
 267 \r
 268 WWDG_IRQHandler\r
 269 PVD_IRQHandler\r
 270 TAMPER_IRQHandler\r
 271 RTC_IRQHandler\r
 272 FLASH_IRQHandler\r
 273 RCC_IRQHandler\r
 274 EXTI0_IRQHandler\r
 275 EXTI1_IRQHandler\r
 276 EXTI2_IRQHandler\r
 277 EXTI3_IRQHandler\r
 278 EXTI4_IRQHandler\r
 279 DMA1_Channel1_IRQHandler\r
 280 DMA1_Channel2_IRQHandler\r
 281 DMA1_Channel3_IRQHandler\r
 282 DMA1_Channel4_IRQHandler\r
 283 DMA1_Channel5_IRQHandler\r
 284 DMA1_Channel6_IRQHandler\r
 285 DMA1_Channel7_IRQHandler\r
 286 ADC1_2_IRQHandler\r
 287 CAN1_TX_IRQHandler\r
 288 CAN1_RX0_IRQHandler\r
 289 CAN1_RX1_IRQHandler\r
 290 CAN1_SCE_IRQHandler\r
 291 EXTI9_5_IRQHandler\r
 292 TIM1_BRK_IRQHandler\r
 293 TIM1_UP_IRQHandler\r
 294 TIM1_TRG_COM_IRQHandler\r
 295 TIM1_CC_IRQHandler\r
 296 TIM2_IRQHandler\r
 297 TIM3_IRQHandler\r
 298 TIM4_IRQHandler\r
 299 I2C1_EV_IRQHandler\r
 300 I2C1_ER_IRQHandler\r
 301 I2C2_EV_IRQHandler\r
 302 I2C2_ER_IRQHandler\r
 303 SPI1_IRQHandler\r
 304 SPI2_IRQHandler\r
 305 USART1_IRQHandler\r
 306 USART2_IRQHandler\r
 307 USART3_IRQHandler\r
 308 EXTI15_10_IRQHandler\r
 309 RTCAlarm_IRQHandler\r
 310 OTG_FS_WKUP_IRQHandler\r
 311 TIM5_IRQHandler\r
 312 SPI3_IRQHandler\r
 313 UART4_IRQHandler\r
 314 UART5_IRQHandler\r
 315 TIM6_IRQHandler\r
 316 TIM7_IRQHandler\r
 317 DMA2_Channel1_IRQHandler\r
 318 DMA2_Channel2_IRQHandler\r
 319 DMA2_Channel3_IRQHandler\r
 320 DMA2_Channel4_IRQHandler\r
 321 DMA2_Channel5_IRQHandler\r
 322 ETH_IRQHandler\r
 323 ETH_WKUP_IRQHandler\r
 324 CAN2_TX_IRQHandler\r
 325 CAN2_RX0_IRQHandler\r
 326 CAN2_RX1_IRQHandler\r
 327 CAN2_SCE_IRQHandler\r
 328 OTG_FS_IRQHandler\r
 329 \r
 330                 B       .\r
 331 \r
 332                 ENDP\r
 333 \r
 334                 ALIGN\r
 335 \r
 336 ;*******************************************************************************\r
 337 ; User Stack and Heap initialization\r
 338 ;*******************************************************************************\r
 339                  IF      :DEF:__MICROLIB\r
 340                 \r
 341                  EXPORT  __initial_sp\r
 342                  EXPORT  __heap_base\r
 343                  EXPORT  __heap_limit\r
 344                 \r
 345                  ELSE\r
 346                 \r
 347                  IMPORT  __use_two_region_memory\r
 348                  EXPORT  __user_initial_stackheap\r
 349                  \r
 350 __user_initial_stackheap\r
 351 \r
 352                  LDR     R0, =  Heap_Mem\r
 353                  LDR     R1, =(Stack_Mem + Stack_Size)\r
 354                  LDR     R2, = (Heap_Mem +  Heap_Size)\r
 355                  LDR     R3, = Stack_Mem\r
 356                  BX      LR\r
 357 \r
 358                  ALIGN\r
 359 \r
 360                  ENDIF\r
 361 \r
 362                  END\r
 363 \r
 364 ;******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE*****\r