2 ******************************************************************************
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3 * @file stm32f10x_dac.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the DAC firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32f10x_dac.h"
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23 #include "stm32f10x_rcc.h"
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25 /** @addtogroup STM32F10x_StdPeriph_Driver
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30 * @brief DAC driver modules
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34 /** @defgroup DAC_Private_TypesDefinitions
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42 /** @defgroup DAC_Private_Defines
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47 #define CR_EN_Set ((uint32_t)0x00000001)
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49 /* DAC DMAEN mask */
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50 #define CR_DMAEN_Set ((uint32_t)0x00001000)
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52 /* CR register Mask */
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53 #define CR_CLEAR_Mask ((uint32_t)0x00000FFE)
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55 /* DAC SWTRIG mask */
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56 #define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001)
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58 /* DAC Dual Channels SWTRIG masks */
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59 #define DUAL_SWTRIG_Set ((uint32_t)0x00000003)
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60 #define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC)
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62 /* DHR registers offsets */
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63 #define DHR12R1_Offset ((uint32_t)0x00000008)
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64 #define DHR12R2_Offset ((uint32_t)0x00000014)
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65 #define DHR12RD_Offset ((uint32_t)0x00000020)
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67 /* DOR register offset */
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68 #define DOR_Offset ((uint32_t)0x0000002C)
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73 /** @defgroup DAC_Private_Macros
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81 /** @defgroup DAC_Private_Variables
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89 /** @defgroup DAC_Private_FunctionPrototypes
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97 /** @defgroup DAC_Private_Functions
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102 * @brief Deinitializes the DAC peripheral registers to their default reset values.
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106 void DAC_DeInit(void)
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108 /* Enable DAC reset state */
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109 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
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110 /* Release DAC from reset state */
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111 RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
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115 * @brief Initializes the DAC peripheral according to the specified
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116 * parameters in the DAC_InitStruct.
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117 * @param DAC_Channel: the selected DAC channel.
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118 * This parameter can be one of the following values:
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119 * @arg DAC_Channel_1: DAC Channel1 selected
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120 * @arg DAC_Channel_2: DAC Channel2 selected
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121 * @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
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122 * contains the configuration information for the specified DAC channel.
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125 void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
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127 uint32_t tmpreg1 = 0, tmpreg2 = 0;
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128 /* Check the DAC parameters */
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129 assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
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130 assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
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131 assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
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132 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
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133 /*---------------------------- DAC CR Configuration --------------------------*/
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134 /* Get the DAC CR value */
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136 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
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137 tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
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138 /* Configure for the selected DAC channel: buffer output, trigger, wave genration,
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139 mask/amplitude for wave genration */
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140 /* Set TSELx and TENx bits according to DAC_Trigger value */
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141 /* Set WAVEx bits according to DAC_WaveGeneration value */
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142 /* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
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143 /* Set BOFFx bit according to DAC_OutputBuffer value */
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144 tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
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145 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
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146 /* Calculate CR register value depending on DAC_Channel */
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147 tmpreg1 |= tmpreg2 << DAC_Channel;
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148 /* Write to DAC CR */
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153 * @brief Fills each DAC_InitStruct member with its default value.
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154 * @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure which will
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158 void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
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160 /*--------------- Reset DAC init structure parameters values -----------------*/
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161 /* Initialize the DAC_Trigger member */
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162 DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
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163 /* Initialize the DAC_WaveGeneration member */
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164 DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
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165 /* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
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166 DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
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167 /* Initialize the DAC_OutputBuffer member */
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168 DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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172 * @brief Enables or disables the specified DAC channel.
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173 * @param DAC_Channel: the selected DAC channel.
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174 * This parameter can be one of the following values:
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175 * @arg DAC_Channel_1: DAC Channel1 selected
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176 * @arg DAC_Channel_2: DAC Channel2 selected
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177 * @param NewState: new state of the DAC channel.
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178 * This parameter can be: ENABLE or DISABLE.
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181 void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
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183 /* Check the parameters */
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184 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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185 assert_param(IS_FUNCTIONAL_STATE(NewState));
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186 if (NewState != DISABLE)
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188 /* Enable the selected DAC channel */
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189 DAC->CR |= CR_EN_Set << DAC_Channel;
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193 /* Disable the selected DAC channel */
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194 DAC->CR &= ~(CR_EN_Set << DAC_Channel);
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199 * @brief Enables or disables the specified DAC channel DMA request.
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200 * @param DAC_Channel: the selected DAC channel.
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201 * This parameter can be one of the following values:
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202 * @arg DAC_Channel_1: DAC Channel1 selected
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203 * @arg DAC_Channel_2: DAC Channel2 selected
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204 * @param NewState: new state of the selected DAC channel DMA request.
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205 * This parameter can be: ENABLE or DISABLE.
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208 void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
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210 /* Check the parameters */
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211 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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212 assert_param(IS_FUNCTIONAL_STATE(NewState));
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213 if (NewState != DISABLE)
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215 /* Enable the selected DAC channel DMA request */
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216 DAC->CR |= CR_DMAEN_Set << DAC_Channel;
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220 /* Disable the selected DAC channel DMA request */
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221 DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
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226 * @brief Enables or disables the selected DAC channel software trigger.
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227 * @param DAC_Channel: the selected DAC channel.
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228 * This parameter can be one of the following values:
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229 * @arg DAC_Channel_1: DAC Channel1 selected
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230 * @arg DAC_Channel_2: DAC Channel2 selected
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231 * @param NewState: new state of the selected DAC channel software trigger.
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232 * This parameter can be: ENABLE or DISABLE.
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235 void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
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237 /* Check the parameters */
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238 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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239 assert_param(IS_FUNCTIONAL_STATE(NewState));
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240 if (NewState != DISABLE)
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242 /* Enable software trigger for the selected DAC channel */
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243 DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
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247 /* Disable software trigger for the selected DAC channel */
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248 DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
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253 * @brief Enables or disables simultaneously the two DAC channels software
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255 * @param NewState: new state of the DAC channels software triggers.
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256 * This parameter can be: ENABLE or DISABLE.
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259 void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
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261 /* Check the parameters */
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262 assert_param(IS_FUNCTIONAL_STATE(NewState));
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263 if (NewState != DISABLE)
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265 /* Enable software trigger for both DAC channels */
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266 DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
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270 /* Disable software trigger for both DAC channels */
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271 DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
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276 * @brief Enables or disables the selected DAC channel wave generation.
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277 * @param DAC_Channel: the selected DAC channel.
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278 * This parameter can be one of the following values:
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279 * @arg DAC_Channel_1: DAC Channel1 selected
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280 * @arg DAC_Channel_2: DAC Channel2 selected
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281 * @param DAC_Wave: Specifies the wave type to enable or disable.
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282 * This parameter can be one of the following values:
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283 * @arg DAC_Wave_Noise: noise wave generation
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284 * @arg DAC_Wave_Triangle: triangle wave generation
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285 * @param NewState: new state of the selected DAC channel wave generation.
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286 * This parameter can be: ENABLE or DISABLE.
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289 void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
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291 /* Check the parameters */
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292 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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293 assert_param(IS_DAC_WAVE(DAC_Wave));
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294 assert_param(IS_FUNCTIONAL_STATE(NewState));
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295 if (NewState != DISABLE)
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297 /* Enable the selected wave generation for the selected DAC channel */
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298 DAC->CR |= DAC_Wave << DAC_Channel;
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302 /* Disable the selected wave generation for the selected DAC channel */
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303 DAC->CR &= ~(DAC_Wave << DAC_Channel);
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308 * @brief Set the specified data holding register value for DAC channel1.
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309 * @param DAC_Align: Specifies the data alignement for DAC channel1.
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310 * This parameter can be one of the following values:
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311 * @arg DAC_Align_8b_R: 8bit right data alignement selected
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312 * @arg DAC_Align_12b_L: 12bit left data alignement selected
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313 * @arg DAC_Align_12b_R: 12bit right data alignement selected
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314 * @param Data : Data to be loaded in the selected data holding register.
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317 void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
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319 __IO uint32_t tmp = 0;
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321 /* Check the parameters */
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322 assert_param(IS_DAC_ALIGN(DAC_Align));
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323 assert_param(IS_DAC_DATA(Data));
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325 tmp = (uint32_t)DAC_BASE;
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326 tmp += DHR12R1_Offset + DAC_Align;
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328 /* Set the DAC channel1 selected data holding register */
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329 *(__IO uint32_t *) tmp = Data;
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333 * @brief Set the specified data holding register value for DAC channel2.
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334 * @param DAC_Align: Specifies the data alignement for DAC channel2.
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335 * This parameter can be one of the following values:
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336 * @arg DAC_Align_8b_R: 8bit right data alignement selected
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337 * @arg DAC_Align_12b_L: 12bit left data alignement selected
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338 * @arg DAC_Align_12b_R: 12bit right data alignement selected
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339 * @param Data : Data to be loaded in the selected data holding register.
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342 void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
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344 __IO uint32_t tmp = 0;
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346 /* Check the parameters */
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347 assert_param(IS_DAC_ALIGN(DAC_Align));
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348 assert_param(IS_DAC_DATA(Data));
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350 tmp = (uint32_t)DAC_BASE;
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351 tmp += DHR12R2_Offset + DAC_Align;
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353 /* Set the DAC channel2 selected data holding register */
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354 *(__IO uint32_t *)tmp = Data;
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358 * @brief Set the specified data holding register value for dual channel
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360 * @param DAC_Align: Specifies the data alignement for dual channel DAC.
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361 * This parameter can be one of the following values:
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362 * @arg DAC_Align_8b_R: 8bit right data alignement selected
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363 * @arg DAC_Align_12b_L: 12bit left data alignement selected
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364 * @arg DAC_Align_12b_R: 12bit right data alignement selected
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365 * @param Data2: Data for DAC Channel2 to be loaded in the selected data
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366 * holding register.
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367 * @param Data1: Data for DAC Channel1 to be loaded in the selected data
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368 * holding register.
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371 void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
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373 uint32_t data = 0, tmp = 0;
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375 /* Check the parameters */
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376 assert_param(IS_DAC_ALIGN(DAC_Align));
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377 assert_param(IS_DAC_DATA(Data1));
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378 assert_param(IS_DAC_DATA(Data2));
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380 /* Calculate and set dual DAC data holding register value */
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381 if (DAC_Align == DAC_Align_8b_R)
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383 data = ((uint32_t)Data2 << 8) | Data1;
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387 data = ((uint32_t)Data2 << 16) | Data1;
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390 tmp = (uint32_t)DAC_BASE;
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391 tmp += DHR12RD_Offset + DAC_Align;
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393 /* Set the dual DAC selected data holding register */
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394 *(__IO uint32_t *)tmp = data;
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398 * @brief Returns the last data output value of the selected DAC cahnnel.
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399 * @param DAC_Channel: the selected DAC channel.
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400 * This parameter can be one of the following values:
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401 * @arg DAC_Channel_1: DAC Channel1 selected
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402 * @arg DAC_Channel_2: DAC Channel2 selected
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403 * @retval The selected DAC channel data output value.
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405 uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
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407 __IO uint32_t tmp = 0;
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409 /* Check the parameters */
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410 assert_param(IS_DAC_CHANNEL(DAC_Channel));
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412 tmp = (uint32_t) DAC_BASE ;
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413 tmp += DOR_Offset + ((uint32_t)DAC_Channel >> 2);
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415 /* Returns the DAC channel data output register value */
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416 return (uint16_t) (*(__IO uint32_t*) tmp);
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431 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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