2 ******************************************************************************
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3 * @file stm32f10x_wwdg.c
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4 * @author MCD Application Team
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7 * @brief This file provides all the WWDG firmware functions.
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8 ******************************************************************************
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11 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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12 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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13 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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14 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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15 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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16 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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18 * <h2><center>© COPYRIGHT 2009 STMicroelectronics</center></h2>
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21 /* Includes ------------------------------------------------------------------*/
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22 #include "stm32f10x_wwdg.h"
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23 #include "stm32f10x_rcc.h"
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25 /** @addtogroup STM32F10x_StdPeriph_Driver
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30 * @brief WWDG driver modules
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34 /** @defgroup WWDG_Private_TypesDefinitions
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42 /** @defgroup WWDG_Private_Defines
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46 /* ----------- WWDG registers bit address in the alias region ----------- */
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47 #define WWDG_OFFSET (WWDG_BASE - PERIPH_BASE)
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49 /* Alias word address of EWI bit */
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50 #define CFR_OFFSET (WWDG_OFFSET + 0x04)
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51 #define EWI_BitNumber 0x09
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52 #define CFR_EWI_BB (PERIPH_BB_BASE + (CFR_OFFSET * 32) + (EWI_BitNumber * 4))
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54 /* --------------------- WWDG registers bit mask ------------------------ */
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56 /* CR register bit mask */
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57 #define CR_WDGA_Set ((uint32_t)0x00000080)
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59 /* CFR register bit mask */
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60 #define CFR_WDGTB_Mask ((uint32_t)0xFFFFFE7F)
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61 #define CFR_W_Mask ((uint32_t)0xFFFFFF80)
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62 #define BIT_Mask ((uint8_t)0x7F)
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68 /** @defgroup WWDG_Private_Macros
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76 /** @defgroup WWDG_Private_Variables
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84 /** @defgroup WWDG_Private_FunctionPrototypes
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92 /** @defgroup WWDG_Private_Functions
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97 * @brief Deinitializes the WWDG peripheral registers to their default reset values.
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101 void WWDG_DeInit(void)
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103 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, ENABLE);
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104 RCC_APB1PeriphResetCmd(RCC_APB1Periph_WWDG, DISABLE);
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108 * @brief Sets the WWDG Prescaler.
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109 * @param WWDG_Prescaler: specifies the WWDG Prescaler.
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110 * This parameter can be one of the following values:
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111 * @arg WWDG_Prescaler_1: WWDG counter clock = (PCLK1/4096)/1
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112 * @arg WWDG_Prescaler_2: WWDG counter clock = (PCLK1/4096)/2
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113 * @arg WWDG_Prescaler_4: WWDG counter clock = (PCLK1/4096)/4
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114 * @arg WWDG_Prescaler_8: WWDG counter clock = (PCLK1/4096)/8
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117 void WWDG_SetPrescaler(uint32_t WWDG_Prescaler)
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119 uint32_t tmpreg = 0;
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120 /* Check the parameters */
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121 assert_param(IS_WWDG_PRESCALER(WWDG_Prescaler));
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122 /* Clear WDGTB[1:0] bits */
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123 tmpreg = WWDG->CFR & CFR_WDGTB_Mask;
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124 /* Set WDGTB[1:0] bits according to WWDG_Prescaler value */
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125 tmpreg |= WWDG_Prescaler;
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126 /* Store the new value */
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127 WWDG->CFR = tmpreg;
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131 * @brief Sets the WWDG window value.
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132 * @param WindowValue: specifies the window value to be compared to the downcounter.
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133 * This parameter value must be lower than 0x80.
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136 void WWDG_SetWindowValue(uint8_t WindowValue)
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138 __IO uint32_t tmpreg = 0;
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140 /* Check the parameters */
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141 assert_param(IS_WWDG_WINDOW_VALUE(WindowValue));
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142 /* Clear W[6:0] bits */
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144 tmpreg = WWDG->CFR & CFR_W_Mask;
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146 /* Set W[6:0] bits according to WindowValue value */
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147 tmpreg |= WindowValue & (uint32_t) BIT_Mask;
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149 /* Store the new value */
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150 WWDG->CFR = tmpreg;
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154 * @brief Enables the WWDG Early Wakeup interrupt(EWI).
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158 void WWDG_EnableIT(void)
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160 *(__IO uint32_t *) CFR_EWI_BB = (uint32_t)ENABLE;
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164 * @brief Sets the WWDG counter value.
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165 * @param Counter: specifies the watchdog counter value.
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166 * This parameter must be a number between 0x40 and 0x7F.
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169 void WWDG_SetCounter(uint8_t Counter)
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171 /* Check the parameters */
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172 assert_param(IS_WWDG_COUNTER(Counter));
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173 /* Write to T[6:0] bits to configure the counter value, no need to do
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174 a read-modify-write; writing a 0 to WDGA bit does nothing */
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175 WWDG->CR = Counter & BIT_Mask;
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179 * @brief Enables WWDG and load the counter value.
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180 * @param Counter: specifies the watchdog counter value.
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181 * This parameter must be a number between 0x40 and 0x7F.
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184 void WWDG_Enable(uint8_t Counter)
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186 /* Check the parameters */
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187 assert_param(IS_WWDG_COUNTER(Counter));
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188 WWDG->CR = CR_WDGA_Set | Counter;
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192 * @brief Checks whether the Early Wakeup interrupt flag is set or not.
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194 * @retval The new state of the Early Wakeup interrupt flag (SET or RESET)
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196 FlagStatus WWDG_GetFlagStatus(void)
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198 return (FlagStatus)(WWDG->SR);
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202 * @brief Clears Early Wakeup interrupt flag.
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206 void WWDG_ClearFlag(void)
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208 WWDG->SR = (uint32_t)RESET;
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223 /******************* (C) COPYRIGHT 2009 STMicroelectronics *****END OF FILE****/
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