1 // I2Cdev library collection - MPU6050 I2C device class
2 // Based on InvenSense MPU-6050 register map document rev. 2.0, 5/19/2011 (RM-MPU-6000A-00)
3 // 8/24/2011 by Jeff Rowberg <jeff@rowberg.net>
4 // Updates should (hopefully) always be available at https://github.com/jrowberg/i2cdevlib
7 // ... - ongoing debug release
9 // NOTE: THIS IS ONLY A PARIAL RELEASE. THIS DEVICE CLASS IS CURRENTLY UNDERGOING ACTIVE
10 // DEVELOPMENT AND IS STILL MISSING SOME IMPORTANT FEATURES. PLEASE KEEP THIS IN MIND IF
11 // YOU DECIDE TO USE THIS PARTICULAR CODE FOR ANYTHING.
13 /* ============================================
14 I2Cdev device library code is placed under the MIT license
15 Copyright (c) 2011 Jeff Rowberg
17 Permission is hereby granted, free of charge, to any person obtaining a copy
18 of this software and associated documentation files (the "Software"), to deal
19 in the Software without restriction, including without limitation the rights
20 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
21 copies of the Software, and to permit persons to whom the Software is
22 furnished to do so, subject to the following conditions:
24 The above copyright notice and this permission notice shall be included in
25 all copies or substantial portions of the Software.
27 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
28 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
29 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
30 AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
31 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
32 OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
34 ===============================================
39 /** Default constructor, uses default I2C address.
40 * @see MPU6050_DEFAULT_ADDRESS
43 devAddr = MPU6050_DEFAULT_ADDRESS;
46 /** Specific address constructor.
47 * @param address I2C address
48 * @see MPU6050_DEFAULT_ADDRESS
49 * @see MPU6050_ADDRESS_AD0_LOW
50 * @see MPU6050_ADDRESS_AD0_HIGH
52 MPU6050::MPU6050(uint8_t address) {
56 /** Power on and prepare for general usage.
57 * This will activate the device and take it out of sleep mode (which must be done
58 * after start-up). This function also sets both the accelerometer and the gyroscope
59 * to their most sensitive settings, namely +/- 2g and +/- 250 degrees/sec, and sets
60 * the clock source to use the X Gyro for reference, which is slightly better than
61 * the default internal clock source.
63 void MPU6050::initialize() {
64 setClockSource(MPU6050_CLOCK_PLL_XGYRO);
65 setFullScaleGyroRange(MPU6050_GYRO_FS_250);
66 setFullScaleAccelRange(MPU6050_ACCEL_FS_2);
67 setSleepEnabled(false); // thanks to Jack Elston for pointing this one out!
70 /** Verify the I2C connection.
71 * Make sure the device is connected and responds as expected.
72 * @return True if connection is valid, false otherwise
74 bool MPU6050::testConnection() {
75 return getDeviceID() == 0b110100;
78 // AUX_VDDIO register (InvenSense demo code calls this RA_*G_OFFS_TC)
80 /** Get the auxiliary I2C supply voltage level.
81 * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
82 * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
83 * the MPU-6000, which does not have a VLOGIC pin.
84 * @return I2C supply voltage level (0=VLOGIC, 1=VDD)
86 uint8_t MPU6050::getAuxVDDIOLevel() {
87 I2Cdev::readBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, buffer);
90 /** Set the auxiliary I2C supply voltage level.
91 * When set to 1, the auxiliary I2C bus high logic level is VDD. When cleared to
92 * 0, the auxiliary I2C bus high logic level is VLOGIC. This does not apply to
93 * the MPU-6000, which does not have a VLOGIC pin.
94 * @param level I2C supply voltage level (0=VLOGIC, 1=VDD)
96 void MPU6050::setAuxVDDIOLevel(uint8_t level) {
97 I2Cdev::writeBit(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_PWR_MODE_BIT, level);
100 // SMPLRT_DIV register
102 /** Get gyroscope output rate divider.
103 * The sensor register output, FIFO output, DMP sampling, Motion detection, Zero
104 * Motion detection, and Free Fall detection are all based on the Sample Rate.
105 * The Sample Rate is generated by dividing the gyroscope output rate by
108 * Sample Rate = Gyroscope Output Rate / (1 + SMPLRT_DIV)
110 * where Gyroscope Output Rate = 8kHz when the DLPF is disabled (DLPF_CFG = 0 or
111 * 7), and 1kHz when the DLPF is enabled (see Register 26).
113 * Note: The accelerometer output rate is 1kHz. This means that for a Sample
114 * Rate greater than 1kHz, the same accelerometer sample may be output to the
115 * FIFO, DMP, and sensor registers more than once.
117 * For a diagram of the gyroscope and accelerometer signal paths, see Section 8
118 * of the MPU-6000/MPU-6050 Product Specification document.
120 * @return Current sample rate
121 * @see MPU6050_RA_SMPLRT_DIV
123 uint8_t MPU6050::getRate() {
124 return I2Cdev::readByte(devAddr, MPU6050_RA_SMPLRT_DIV, buffer);
127 /** Set gyroscope sample rate divider.
128 * @param rate New sample rate divider
130 * @see MPU6050_RA_SMPLRT_DIV
132 void MPU6050::setRate(uint8_t rate) {
133 I2Cdev::writeByte(devAddr, MPU6050_RA_SMPLRT_DIV, rate);
138 /** Get external FSYNC configuration.
139 * Configures the external Frame Synchronization (FSYNC) pin sampling. An
140 * external signal connected to the FSYNC pin can be sampled by configuring
141 * EXT_SYNC_SET. Signal changes to the FSYNC pin are latched so that short
142 * strobes may be captured. The latched FSYNC signal will be sampled at the
143 * Sampling Rate, as defined in register 25. After sampling, the latch will
144 * reset to the current FSYNC signal state.
146 * The sampled value will be reported in place of the least significant bit in
147 * a sensor data register determined by the value of EXT_SYNC_SET according to
148 * the following table.
151 * EXT_SYNC_SET | FSYNC Bit Location
152 * -------------+-------------------
158 * 5 | ACCEL_XOUT_L[0]
159 * 6 | ACCEL_YOUT_L[0]
160 * 7 | ACCEL_ZOUT_L[0]
163 * @return FSYNC configuration value
165 uint8_t MPU6050::getExternalFrameSync() {
166 I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, buffer);
169 /** Set external FSYNC configuration.
170 * @see getExternalFrameSync()
171 * @see MPU6050_RA_CONFIG
172 * @param sync New FSYNC configuration value
174 void MPU6050::setExternalFrameSync(uint8_t sync) {
175 I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_EXT_SYNC_SET_BIT, MPU6050_CFG_EXT_SYNC_SET_LENGTH, sync);
177 /** Get digital low-pass filter configuration.
178 * The DLPF_CFG parameter sets the digital low pass filter configuration. It
179 * also determines the internal sampling rate used by the device as shown in
182 * Note: The accelerometer output rate is 1kHz. This means that for a Sample
183 * Rate greater than 1kHz, the same accelerometer sample may be output to the
184 * FIFO, DMP, and sensor registers more than once.
187 * | ACCELEROMETER | GYROSCOPE
188 * DLPF_CFG | Bandwidth | Delay | Bandwidth | Delay | Sample Rate
189 * ---------+-----------+--------+-----------+--------+-------------
190 * 0 | 260Hz | 0ms | 256Hz | 0.98ms | 8kHz
191 * 1 | 184Hz | 2.0ms | 188Hz | 1.9ms | 1kHz
192 * 2 | 94Hz | 3.0ms | 98Hz | 2.8ms | 1kHz
193 * 3 | 44Hz | 4.9ms | 42Hz | 4.8ms | 1kHz
194 * 4 | 21Hz | 8.5ms | 20Hz | 8.3ms | 1kHz
195 * 5 | 10Hz | 13.8ms | 10Hz | 13.4ms | 1kHz
196 * 6 | 5Hz | 19.0ms | 5Hz | 18.6ms | 1kHz
197 * 7 | -- Reserved -- | -- Reserved -- | Reserved
200 * @return DLFP configuration
201 * @see MPU6050_RA_CONFIG
202 * @see MPU6050_CFG_DLPF_CFG_BIT
203 * @see MPU6050_CFG_DLPF_CFG_LENGTH
205 uint8_t MPU6050::getDLPFMode() {
206 I2Cdev::readBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, buffer);
209 /** Set digital low-pass filter configuration.
210 * @param mode New DLFP configuration setting
211 * @see getDLPFBandwidth()
212 * @see MPU6050_DLPF_BW_256
213 * @see MPU6050_RA_CONFIG
214 * @see MPU6050_CFG_DLPF_CFG_BIT
215 * @see MPU6050_CFG_DLPF_CFG_LENGTH
217 void MPU6050::setDLPFMode(uint8_t mode) {
218 I2Cdev::writeBits(devAddr, MPU6050_RA_CONFIG, MPU6050_CFG_DLPF_CFG_BIT, MPU6050_CFG_DLPF_CFG_LENGTH, mode);
221 // GYRO_CONFIG register
223 /** Get full-scale gyroscope range.
224 * The FS_SEL parameter allows setting the full-scale range of the gyro sensors,
225 * as described in the table below.
228 * 0 = +/- 250 degrees/sec
229 * 1 = +/- 500 degrees/sec
230 * 2 = +/- 1000 degrees/sec
231 * 3 = +/- 2000 degrees/sec
234 * @return Current full-scale gyroscope range setting
235 * @see MPU6050_GYRO_FS_250
236 * @see MPU6050_RA_GYRO_CONFIG
237 * @see MPU6050_GCONFIG_FS_SEL_BIT
238 * @see MPU6050_GCONFIG_FS_SEL_LENGTH
240 uint8_t MPU6050::getFullScaleGyroRange() {
241 I2Cdev::readBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, buffer);
244 /** Set full-scale gyroscope range.
245 * @param range New full-scale gyroscope range value
246 * @see getFullScaleRange()
247 * @see MPU6050_GYRO_FS_250
248 * @see MPU6050_RA_GYRO_CONFIG
249 * @see MPU6050_GCONFIG_FS_SEL_BIT
250 * @see MPU6050_GCONFIG_FS_SEL_LENGTH
252 void MPU6050::setFullScaleGyroRange(uint8_t range) {
253 I2Cdev::writeBits(devAddr, MPU6050_RA_GYRO_CONFIG, MPU6050_GCONFIG_FS_SEL_BIT, MPU6050_GCONFIG_FS_SEL_LENGTH, range);
256 // ACCEL_CONFIG register
258 /** Get self-test enabled setting for accelerometer X axis.
259 * @return Self-test enabled value
260 * @see MPU6050_RA_ACCEL_CONFIG
262 bool MPU6050::getAccelXSelfTest() {
263 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, buffer);
266 /** Get self-test enabled setting for accelerometer X axis.
267 * @param enabled Self-test enabled value
268 * @see MPU6050_RA_ACCEL_CONFIG
270 void MPU6050::setAccelXSelfTest(bool enabled) {
271 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_XA_ST_BIT, enabled);
273 /** Get self-test enabled value for accelerometer Y axis.
274 * @return Self-test enabled value
275 * @see MPU6050_RA_ACCEL_CONFIG
277 bool MPU6050::getAccelYSelfTest() {
278 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, buffer);
281 /** Get self-test enabled value for accelerometer Y axis.
282 * @param enabled Self-test enabled value
283 * @see MPU6050_RA_ACCEL_CONFIG
285 void MPU6050::setAccelYSelfTest(bool enabled) {
286 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_YA_ST_BIT, enabled);
288 /** Get self-test enabled value for accelerometer Z axis.
289 * @return Self-test enabled value
290 * @see MPU6050_RA_ACCEL_CONFIG
292 bool MPU6050::getAccelZSelfTest() {
293 I2Cdev::readBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, buffer);
296 /** Set self-test enabled value for accelerometer Z axis.
297 * @param enabled Self-test enabled value
298 * @see MPU6050_RA_ACCEL_CONFIG
300 void MPU6050::setAccelZSelfTest(bool enabled) {
301 I2Cdev::writeBit(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ZA_ST_BIT, enabled);
303 /** Get full-scale accelerometer range.
304 * The FS_SEL parameter allows setting the full-scale range of the accelerometer
305 * sensors, as described in the table below.
314 * @return Current full-scale accelerometer range setting
315 * @see MPU6050_ACCEL_FS_2
316 * @see MPU6050_RA_ACCEL_CONFIG
317 * @see MPU6050_ACONFIG_AFS_SEL_BIT
318 * @see MPU6050_ACONFIG_AFS_SEL_LENGTH
320 uint8_t MPU6050::getFullScaleAccelRange() {
321 I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, buffer);
324 /** Set full-scale accelerometer range.
325 * @param range New full-scale accelerometer range setting
326 * @see getFullScaleAccelRange()
328 void MPU6050::setFullScaleAccelRange(uint8_t range) {
329 I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_AFS_SEL_BIT, MPU6050_ACONFIG_AFS_SEL_LENGTH, range);
331 /** Get the high-pass filter configuration.
332 * The DHPF is a filter module in the path leading to motion detectors (Free
333 * Fall, Motion threshold, and Zero Motion). The high pass filter output is not
334 * available to the data registers (see Figure in Section 8 of the MPU-6000/
335 * MPU-6050 Product Specification document).
337 * The high pass filter has three modes:
340 * Reset: The filter output settles to zero within one sample. This
341 * effectively disables the high pass filter. This mode may be toggled
342 * to quickly settle the filter.
344 * On: The high pass filter will pass signals above the cut off frequency.
346 * Hold: When triggered, the filter holds the present sample. The filter
347 * output will be the difference between the input sample and the held
352 * ACCEL_HPF | Filter Mode | Cut-off Frequency
353 * ----------+-------------+------------------
362 * @return Current high-pass filter configuration
363 * @see MPU6050_DHPF_RESET
364 * @see MPU6050_RA_ACCEL_CONFIG
366 uint8_t MPU6050::getDHPFMode() {
367 I2Cdev::readBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, buffer);
370 /** Set the high-pass filter configuration.
371 * @param bandwidth New high-pass filter configuration
373 * @see MPU6050_DHPF_RESET
374 * @see MPU6050_RA_ACCEL_CONFIG
376 void MPU6050::setDHPFMode(uint8_t bandwidth) {
377 I2Cdev::writeBits(devAddr, MPU6050_RA_ACCEL_CONFIG, MPU6050_ACONFIG_ACCEL_HPF_BIT, MPU6050_ACONFIG_ACCEL_HPF_LENGTH, bandwidth);
382 /** Get free-fall event acceleration threshold.
383 * This register configures the detection threshold for Free Fall event
384 * detection. The unit of FF_THR is 1LSB = 2mg. Free Fall is detected when the
385 * absolute value of the accelerometer measurements for the three axes are each
386 * less than the detection threshold. This condition increments the Free Fall
387 * duration counter (Register 30). The Free Fall interrupt is triggered when the
388 * Free Fall duration counter reaches the time specified in FF_DUR.
390 * For more details on the Free Fall detection interrupt, see Section 8.2 of the
391 * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
392 * 58 of this document.
394 * @return Current free-fall acceleration threshold value (LSB = 2mg)
395 * @see MPU6050_RA_FF_THR
397 uint8_t MPU6050::getFreefallDetectionThreshold() {
398 I2Cdev::readByte(devAddr, MPU6050_RA_FF_THR, buffer);
401 /** Get free-fall event acceleration threshold.
402 * @param threshold New free-fall acceleration threshold value (LSB = 2mg)
403 * @see getFreefallDetectionThreshold()
404 * @see MPU6050_RA_FF_THR
406 void MPU6050::setFreefallDetectionThreshold(uint8_t threshold) {
407 I2Cdev::writeByte(devAddr, MPU6050_RA_FF_THR, threshold);
412 /** Get free-fall event duration threshold.
413 * This register configures the duration counter threshold for Free Fall event
414 * detection. The duration counter ticks at 1kHz, therefore FF_DUR has a unit
417 * The Free Fall duration counter increments while the absolute value of the
418 * accelerometer measurements are each less than the detection threshold
419 * (Register 29). The Free Fall interrupt is triggered when the Free Fall
420 * duration counter reaches the time specified in this register.
422 * For more details on the Free Fall detection interrupt, see Section 8.2 of
423 * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
424 * and 58 of this document.
426 * @return Current free-fall duration threshold value (LSB = 1ms)
427 * @see MPU6050_RA_FF_DUR
429 uint8_t MPU6050::getFreefallDetectionDuration() {
430 I2Cdev::readByte(devAddr, MPU6050_RA_FF_DUR, buffer);
433 /** Get free-fall event duration threshold.
434 * @param duration New free-fall duration threshold value (LSB = 1ms)
435 * @see getFreefallDetectionDuration()
436 * @see MPU6050_RA_FF_DUR
438 void MPU6050::setFreefallDetectionDuration(uint8_t duration) {
439 I2Cdev::writeByte(devAddr, MPU6050_RA_FF_DUR, duration);
444 /** Get motion detection event acceleration threshold.
445 * This register configures the detection threshold for Motion interrupt
446 * generation. The unit of MOT_THR is 1LSB = 2mg. Motion is detected when the
447 * absolute value of any of the accelerometer measurements exceeds this Motion
448 * detection threshold. This condition increments the Motion detection duration
449 * counter (Register 32). The Motion detection interrupt is triggered when the
450 * Motion Detection counter reaches the time count specified in MOT_DUR
453 * The Motion interrupt will indicate the axis and polarity of detected motion
454 * in MOT_DETECT_STATUS (Register 97).
456 * For more details on the Motion detection interrupt, see Section 8.3 of the
457 * MPU-6000/MPU-6050 Product Specification document as well as Registers 56 and
458 * 58 of this document.
460 * @return Current motion detection acceleration threshold value (LSB = 2mg)
461 * @see MPU6050_RA_MOT_THR
463 uint8_t MPU6050::getMotionDetectionThreshold() {
464 I2Cdev::readByte(devAddr, MPU6050_RA_MOT_THR, buffer);
467 /** Set free-fall event acceleration threshold.
468 * @param threshold New motion detection acceleration threshold value (LSB = 2mg)
469 * @see getMotionDetectionThreshold()
470 * @see MPU6050_RA_MOT_THR
472 void MPU6050::setMotionDetectionThreshold(uint8_t threshold) {
473 I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_THR, threshold);
478 /** Get motion detection event duration threshold.
479 * This register configures the duration counter threshold for Motion interrupt
480 * generation. The duration counter ticks at 1 kHz, therefore MOT_DUR has a unit
481 * of 1LSB = 1ms. The Motion detection duration counter increments when the
482 * absolute value of any of the accelerometer measurements exceeds the Motion
483 * detection threshold (Register 31). The Motion detection interrupt is
484 * triggered when the Motion detection counter reaches the time count specified
487 * For more details on the Motion detection interrupt, see Section 8.3 of the
488 * MPU-6000/MPU-6050 Product Specification document.
490 * @return Current motion detection duration threshold value (LSB = 1ms)
491 * @see MPU6050_RA_MOT_DUR
493 uint8_t MPU6050::getMotionDetectionDuration() {
494 I2Cdev::readByte(devAddr, MPU6050_RA_MOT_DUR, buffer);
497 /** Set motion detection event duration threshold.
498 * @param duration New motion detection duration threshold value (LSB = 1ms)
499 * @see getMotionDetectionDuration()
500 * @see MPU6050_RA_MOT_DUR
502 void MPU6050::setMotionDetectionDuration(uint8_t duration) {
503 I2Cdev::writeByte(devAddr, MPU6050_RA_MOT_DUR, duration);
506 // ZRMOT_THR register
508 /** Get zero motion detection event acceleration threshold.
509 * This register configures the detection threshold for Zero Motion interrupt
510 * generation. The unit of ZRMOT_THR is 1LSB = 2mg. Zero Motion is detected when
511 * the absolute value of the accelerometer measurements for the 3 axes are each
512 * less than the detection threshold. This condition increments the Zero Motion
513 * duration counter (Register 34). The Zero Motion interrupt is triggered when
514 * the Zero Motion duration counter reaches the time count specified in
515 * ZRMOT_DUR (Register 34).
517 * Unlike Free Fall or Motion detection, Zero Motion detection triggers an
518 * interrupt both when Zero Motion is first detected and when Zero Motion is no
521 * When a zero motion event is detected, a Zero Motion Status will be indicated
522 * in the MOT_DETECT_STATUS register (Register 97). When a motion-to-zero-motion
523 * condition is detected, the status bit is set to 1. When a zero-motion-to-
524 * motion condition is detected, the status bit is set to 0.
526 * For more details on the Zero Motion detection interrupt, see Section 8.4 of
527 * the MPU-6000/MPU-6050 Product Specification document as well as Registers 56
528 * and 58 of this document.
530 * @return Current zero motion detection acceleration threshold value (LSB = 2mg)
531 * @see MPU6050_RA_ZRMOT_THR
533 uint8_t MPU6050::getZeroMotionDetectionThreshold() {
534 I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_THR, buffer);
537 /** Set zero motion detection event acceleration threshold.
538 * @param threshold New zero motion detection acceleration threshold value (LSB = 2mg)
539 * @see getZeroMotionDetectionThreshold()
540 * @see MPU6050_RA_ZRMOT_THR
542 void MPU6050::setZeroMotionDetectionThreshold(uint8_t threshold) {
543 I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_THR, threshold);
546 // ZRMOT_DUR register
548 /** Get zero motion detection event duration threshold.
549 * This register configures the duration counter threshold for Zero Motion
550 * interrupt generation. The duration counter ticks at 16 Hz, therefore
551 * ZRMOT_DUR has a unit of 1 LSB = 64 ms. The Zero Motion duration counter
552 * increments while the absolute value of the accelerometer measurements are
553 * each less than the detection threshold (Register 33). The Zero Motion
554 * interrupt is triggered when the Zero Motion duration counter reaches the time
555 * count specified in this register.
557 * For more details on the Zero Motion detection interrupt, see Section 8.4 of
558 * the MPU-6000/MPU-6050 Product Specification document, as well as Registers 56
559 * and 58 of this document.
561 * @return Current zero motion detection duration threshold value (LSB = 64ms)
562 * @see MPU6050_RA_ZRMOT_DUR
564 uint8_t MPU6050::getZeroMotionDetectionDuration() {
565 I2Cdev::readByte(devAddr, MPU6050_RA_ZRMOT_DUR, buffer);
568 /** Set zero motion detection event duration threshold.
569 * @param duration New zero motion detection duration threshold value (LSB = 1ms)
570 * @see getZeroMotionDetectionDuration()
571 * @see MPU6050_RA_ZRMOT_DUR
573 void MPU6050::setZeroMotionDetectionDuration(uint8_t duration) {
574 I2Cdev::writeByte(devAddr, MPU6050_RA_ZRMOT_DUR, duration);
579 /** Get temperature FIFO enabled value.
580 * When set to 1, this bit enables TEMP_OUT_H and TEMP_OUT_L (Registers 65 and
581 * 66) to be written into the FIFO buffer.
582 * @return Current temperature FIFO enabled value
583 * @see MPU6050_RA_FIFO_EN
585 bool MPU6050::getTempFIFOEnabled() {
586 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, buffer);
589 /** Set temperature FIFO enabled value.
590 * @param enabled New temperature FIFO enabled value
591 * @see getTempFIFOEnabled()
592 * @see MPU6050_RA_FIFO_EN
594 void MPU6050::setTempFIFOEnabled(bool enabled) {
595 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_TEMP_FIFO_EN_BIT, enabled);
597 /** Get gyroscope X-axis FIFO enabled value.
598 * When set to 1, this bit enables GYRO_XOUT_H and GYRO_XOUT_L (Registers 67 and
599 * 68) to be written into the FIFO buffer.
600 * @return Current gyroscope X-axis FIFO enabled value
601 * @see MPU6050_RA_FIFO_EN
603 bool MPU6050::getXGyroFIFOEnabled() {
604 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, buffer);
607 /** Set gyroscope X-axis FIFO enabled value.
608 * @param enabled New gyroscope X-axis FIFO enabled value
609 * @see getXGyroFIFOEnabled()
610 * @see MPU6050_RA_FIFO_EN
612 void MPU6050::setXGyroFIFOEnabled(bool enabled) {
613 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_XG_FIFO_EN_BIT, enabled);
615 /** Get gyroscope Y-axis FIFO enabled value.
616 * When set to 1, this bit enables GYRO_YOUT_H and GYRO_YOUT_L (Registers 69 and
617 * 70) to be written into the FIFO buffer.
618 * @return Current gyroscope Y-axis FIFO enabled value
619 * @see MPU6050_RA_FIFO_EN
621 bool MPU6050::getYGyroFIFOEnabled() {
622 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, buffer);
625 /** Set gyroscope Y-axis FIFO enabled value.
626 * @param enabled New gyroscope Y-axis FIFO enabled value
627 * @see getYGyroFIFOEnabled()
628 * @see MPU6050_RA_FIFO_EN
630 void MPU6050::setYGyroFIFOEnabled(bool enabled) {
631 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_YG_FIFO_EN_BIT, enabled);
633 /** Get gyroscope Z-axis FIFO enabled value.
634 * When set to 1, this bit enables GYRO_ZOUT_H and GYRO_ZOUT_L (Registers 71 and
635 * 72) to be written into the FIFO buffer.
636 * @return Current gyroscope Z-axis FIFO enabled value
637 * @see MPU6050_RA_FIFO_EN
639 bool MPU6050::getZGyroFIFOEnabled() {
640 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, buffer);
643 /** Set gyroscope Z-axis FIFO enabled value.
644 * @param enabled New gyroscope Z-axis FIFO enabled value
645 * @see getZGyroFIFOEnabled()
646 * @see MPU6050_RA_FIFO_EN
648 void MPU6050::setZGyroFIFOEnabled(bool enabled) {
649 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ZG_FIFO_EN_BIT, enabled);
651 /** Get accelerometer FIFO enabled value.
652 * When set to 1, this bit enables ACCEL_XOUT_H, ACCEL_XOUT_L, ACCEL_YOUT_H,
653 * ACCEL_YOUT_L, ACCEL_ZOUT_H, and ACCEL_ZOUT_L (Registers 59 to 64) to be
654 * written into the FIFO buffer.
655 * @return Current accelerometer FIFO enabled value
656 * @see MPU6050_RA_FIFO_EN
658 bool MPU6050::getAccelFIFOEnabled() {
659 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, buffer);
662 /** Set accelerometer FIFO enabled value.
663 * @param enabled New accelerometer FIFO enabled value
664 * @see getAccelFIFOEnabled()
665 * @see MPU6050_RA_FIFO_EN
667 void MPU6050::setAccelFIFOEnabled(bool enabled) {
668 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_ACCEL_FIFO_EN_BIT, enabled);
670 /** Get Slave 2 FIFO enabled value.
671 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
672 * associated with Slave 2 to be written into the FIFO buffer.
673 * @return Current Slave 2 FIFO enabled value
674 * @see MPU6050_RA_FIFO_EN
676 bool MPU6050::getSlave2FIFOEnabled() {
677 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, buffer);
680 /** Set Slave 2 FIFO enabled value.
681 * @param enabled New Slave 2 FIFO enabled value
682 * @see getSlave2FIFOEnabled()
683 * @see MPU6050_RA_FIFO_EN
685 void MPU6050::setSlave2FIFOEnabled(bool enabled) {
686 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV2_FIFO_EN_BIT, enabled);
688 /** Get Slave 1 FIFO enabled value.
689 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
690 * associated with Slave 1 to be written into the FIFO buffer.
691 * @return Current Slave 1 FIFO enabled value
692 * @see MPU6050_RA_FIFO_EN
694 bool MPU6050::getSlave1FIFOEnabled() {
695 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, buffer);
698 /** Set Slave 1 FIFO enabled value.
699 * @param enabled New Slave 1 FIFO enabled value
700 * @see getSlave1FIFOEnabled()
701 * @see MPU6050_RA_FIFO_EN
703 void MPU6050::setSlave1FIFOEnabled(bool enabled) {
704 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV1_FIFO_EN_BIT, enabled);
706 /** Get Slave 0 FIFO enabled value.
707 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
708 * associated with Slave 0 to be written into the FIFO buffer.
709 * @return Current Slave 0 FIFO enabled value
710 * @see MPU6050_RA_FIFO_EN
712 bool MPU6050::getSlave0FIFOEnabled() {
713 I2Cdev::readBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, buffer);
716 /** Set Slave 0 FIFO enabled value.
717 * @param enabled New Slave 0 FIFO enabled value
718 * @see getSlave0FIFOEnabled()
719 * @see MPU6050_RA_FIFO_EN
721 void MPU6050::setSlave0FIFOEnabled(bool enabled) {
722 I2Cdev::writeBit(devAddr, MPU6050_RA_FIFO_EN, MPU6050_SLV0_FIFO_EN_BIT, enabled);
725 // I2C_MST_CTRL register
727 /** Get multi-master enabled value.
728 * Multi-master capability allows multiple I2C masters to operate on the same
729 * bus. In circuits where multi-master capability is required, set MULT_MST_EN
730 * to 1. This will increase current drawn by approximately 30uA.
732 * In circuits where multi-master capability is required, the state of the I2C
733 * bus must always be monitored by each separate I2C Master. Before an I2C
734 * Master can assume arbitration of the bus, it must first confirm that no other
735 * I2C Master has arbitration of the bus. When MULT_MST_EN is set to 1, the
736 * MPU-60X0's bus arbitration detection logic is turned on, enabling it to
737 * detect when the bus is available.
739 * @return Current multi-master enabled value
740 * @see MPU6050_RA_I2C_MST_CTRL
742 bool MPU6050::getMultiMasterEnabled() {
743 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, buffer);
746 /** Set multi-master enabled value.
747 * @param enabled New multi-master enabled value
748 * @see getMultiMasterEnabled()
749 * @see MPU6050_RA_I2C_MST_CTRL
751 void MPU6050::setMultiMasterEnabled(bool enabled) {
752 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_MULT_MST_EN_BIT, enabled);
754 /** Get wait-for-external-sensor-data enabled value.
755 * When the WAIT_FOR_ES bit is set to 1, the Data Ready interrupt will be
756 * delayed until External Sensor data from the Slave Devices are loaded into the
757 * EXT_SENS_DATA registers. This is used to ensure that both the internal sensor
758 * data (i.e. from gyro and accel) and external sensor data have been loaded to
759 * their respective data registers (i.e. the data is synced) when the Data Ready
760 * interrupt is triggered.
762 * @return Current wait-for-external-sensor-data enabled value
763 * @see MPU6050_RA_I2C_MST_CTRL
765 bool MPU6050::getWaitForExternalSensorEnabled() {
766 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, buffer);
769 /** Set wait-for-external-sensor-data enabled value.
770 * @param enabled New wait-for-external-sensor-data enabled value
771 * @see getWaitForExternalSensorEnabled()
772 * @see MPU6050_RA_I2C_MST_CTRL
774 void MPU6050::setWaitForExternalSensorEnabled(bool enabled) {
775 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_WAIT_FOR_ES_BIT, enabled);
777 /** Get Slave 3 FIFO enabled value.
778 * When set to 1, this bit enables EXT_SENS_DATA registers (Registers 73 to 96)
779 * associated with Slave 3 to be written into the FIFO buffer.
780 * @return Current Slave 3 FIFO enabled value
781 * @see MPU6050_RA_MST_CTRL
783 bool MPU6050::getSlave3FIFOEnabled() {
784 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, buffer);
787 /** Set Slave 3 FIFO enabled value.
788 * @param enabled New Slave 3 FIFO enabled value
789 * @see getSlave3FIFOEnabled()
790 * @see MPU6050_RA_MST_CTRL
792 void MPU6050::setSlave3FIFOEnabled(bool enabled) {
793 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_SLV_3_FIFO_EN_BIT, enabled);
795 /** Get slave read/write transition enabled value.
796 * The I2C_MST_P_NSR bit configures the I2C Master's transition from one slave
797 * read to the next slave read. If the bit equals 0, there will be a restart
798 * between reads. If the bit equals 1, there will be a stop followed by a start
799 * of the following read. When a write transaction follows a read transaction,
800 * the stop followed by a start of the successive write will be always used.
802 * @return Current slave read/write transition enabled value
803 * @see MPU6050_RA_I2C_MST_CTRL
805 bool MPU6050::getSlaveReadWriteTransitionEnabled() {
806 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, buffer);
809 /** Set slave read/write transition enabled value.
810 * @param enabled New slave read/write transition enabled value
811 * @see getSlaveReadWriteTransitionEnabled()
812 * @see MPU6050_RA_I2C_MST_CTRL
814 void MPU6050::setSlaveReadWriteTransitionEnabled(bool enabled) {
815 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_P_NSR_BIT, enabled);
817 /** Get I2C master clock speed.
818 * I2C_MST_CLK is a 4 bit unsigned value which configures a divider on the
819 * MPU-60X0 internal 8MHz clock. It sets the I2C master clock speed according to
820 * the following table:
823 * I2C_MST_CLK | I2C Master Clock Speed | 8MHz Clock Divider
824 * ------------+------------------------+-------------------
843 * @return Current I2C master clock speed
844 * @see MPU6050_RA_I2C_MST_CTRL
846 uint8_t MPU6050::getMasterClockSpeed() {
847 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, buffer);
850 /** Set I2C master clock speed.
851 * @reparam speed Current I2C master clock speed
852 * @see MPU6050_RA_I2C_MST_CTRL
854 void MPU6050::setMasterClockSpeed(uint8_t speed) {
855 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_MST_CTRL, MPU6050_I2C_MST_CLK_BIT, MPU6050_I2C_MST_CLK_LENGTH, speed);
858 // I2C_SLV* registers (Slave 0-3)
860 /** Get the I2C address of the specified slave (0-3).
861 * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
862 * operation, and if it is cleared, then it's a write operation. The remaining
863 * bits (6-0) are the 7-bit device address of the slave device.
865 * In read mode, the result of the read is placed in the lowest available
866 * EXT_SENS_DATA register. For further information regarding the allocation of
867 * read results, please refer to the EXT_SENS_DATA register description
868 * (Registers 73
\96 96).
870 * The MPU-6050 supports a total of five slaves, but Slave 4 has unique
871 * characteristics, and so it has its own functions (getSlave4* and setSlave4*).
873 * I2C data transactions are performed at the Sample Rate, as defined in
874 * Register 25. The user is responsible for ensuring that I2C data transactions
875 * to and from each enabled Slave can be completed within a single period of the
878 * The I2C slave access rate can be reduced relative to the Sample Rate. This
879 * reduced access rate is determined by I2C_MST_DLY (Register 52). Whether a
880 * slave's access rate is reduced relative to the Sample Rate is determined by
881 * I2C_MST_DELAY_CTRL (Register 103).
883 * The processing order for the slaves is fixed. The sequence followed for
884 * processing the slaves is Slave 0, Slave 1, Slave 2, Slave 3 and Slave 4. If a
885 * particular Slave is disabled it will be skipped.
887 * Each slave can either be accessed at the sample rate or at a reduced sample
888 * rate. In a case where some slaves are accessed at the Sample Rate and some
889 * slaves are accessed at the reduced rate, the sequence of accessing the slaves
890 * (Slave 0 to Slave 4) is still followed. However, the reduced rate slaves will
891 * be skipped if their access rate dictates that they should not be accessed
892 * during that particular cycle. For further information regarding the reduced
893 * access rate, please refer to Register 52. Whether a slave is accessed at the
894 * Sample Rate or at the reduced rate is determined by the Delay Enable bits in
897 * @param num Slave number (0-3)
898 * @return Current address for specified slave
899 * @see MPU6050_RA_I2C_SLV0_ADDR
901 uint8_t MPU6050::getSlaveAddress(uint8_t num) {
902 if (num > 3) return 0;
903 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, buffer);
906 /** Set the I2C address of the specified slave (0-3).
907 * @param num Slave number (0-3)
908 * @param address New address for specified slave
909 * @see getSlaveAddress()
910 * @see MPU6050_RA_I2C_SLV0_ADDR
912 void MPU6050::setSlaveAddress(uint8_t num, uint8_t address) {
914 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_ADDR + num*3, address);
916 /** Get the active internal register for the specified slave (0-3).
917 * Read/write operations for this slave will be done to whatever internal
918 * register address is stored in this MPU register.
920 * The MPU-6050 supports a total of five slaves, but Slave 4 has unique
921 * characteristics, and so it has its own functions.
923 * @param num Slave number (0-3)
924 * @return Current active register for specified slave
925 * @see MPU6050_RA_I2C_SLV0_REG
927 uint8_t MPU6050::getSlaveRegister(uint8_t num) {
928 if (num > 3) return 0;
929 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, buffer);
932 /** Set the active internal register for the specified slave (0-3).
933 * @param num Slave number (0-3)
934 * @param reg New active register for specified slave
935 * @see getSlaveRegister()
936 * @see MPU6050_RA_I2C_SLV0_REG
938 void MPU6050::setSlaveRegister(uint8_t num, uint8_t reg) {
940 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_REG + num*3, reg);
942 /** Get the enabled value for the specified slave (0-3).
943 * When set to 1, this bit enables Slave 0 for data transfer operations. When
944 * cleared to 0, this bit disables Slave 0 from data transfer operations.
945 * @param num Slave number (0-3)
946 * @return Current enabled value for specified slave
947 * @see MPU6050_RA_I2C_SLV0_CTRL
949 bool MPU6050::getSlaveEnabled(uint8_t num) {
950 if (num > 3) return 0;
951 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, buffer);
954 /** Set the enabled value for the specified slave (0-3).
955 * @param num Slave number (0-3)
956 * @param enabled New enabled value for specified slave
957 * @see getSlaveEnabled()
958 * @see MPU6050_RA_I2C_SLV0_CTRL
960 void MPU6050::setSlaveEnabled(uint8_t num, bool enabled) {
962 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_EN_BIT, enabled);
964 /** Get word pair byte-swapping enabled for the specified slave (0-3).
965 * When set to 1, this bit enables byte swapping. When byte swapping is enabled,
966 * the high and low bytes of a word pair are swapped. Please refer to
967 * I2C_SLV0_GRP for the pairing convention of the word pairs. When cleared to 0,
968 * bytes transferred to and from Slave 0 will be written to EXT_SENS_DATA
969 * registers in the order they were transferred.
971 * @param num Slave number (0-3)
972 * @return Current word pair byte-swapping enabled value for specified slave
973 * @see MPU6050_RA_I2C_SLV0_CTRL
975 bool MPU6050::getSlaveWordByteSwap(uint8_t num) {
976 if (num > 3) return 0;
977 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, buffer);
980 /** Set word pair byte-swapping enabled for the specified slave (0-3).
981 * @param num Slave number (0-3)
982 * @param enabled New word pair byte-swapping enabled value for specified slave
983 * @see getSlaveWordByteSwap()
984 * @see MPU6050_RA_I2C_SLV0_CTRL
986 void MPU6050::setSlaveWordByteSwap(uint8_t num, bool enabled) {
988 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_BYTE_SW_BIT, enabled);
990 /** Get write mode for the specified slave (0-3).
991 * When set to 1, the transaction will read or write data only. When cleared to
992 * 0, the transaction will write a register address prior to reading or writing
993 * data. This should equal 0 when specifying the register address within the
994 * Slave device to/from which the ensuing data transaction will take place.
996 * @param num Slave number (0-3)
997 * @return Current write mode for specified slave (0 = register address + data, 1 = data only)
998 * @see MPU6050_RA_I2C_SLV0_CTRL
1000 bool MPU6050::getSlaveWriteMode(uint8_t num) {
1001 if (num > 3) return 0;
1002 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, buffer);
1005 /** Set write mode for the specified slave (0-3).
1006 * @param num Slave number (0-3)
1007 * @param mode New write mode for specified slave (0 = register address + data, 1 = data only)
1008 * @see getSlaveWriteMode()
1009 * @see MPU6050_RA_I2C_SLV0_CTRL
1011 void MPU6050::setSlaveWriteMode(uint8_t num, bool mode) {
1012 if (num > 3) return;
1013 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_REG_DIS_BIT, mode);
1015 /** Get word pair grouping order offset for the specified slave (0-3).
1016 * This sets specifies the grouping order of word pairs received from registers.
1017 * When cleared to 0, bytes from register addresses 0 and 1, 2 and 3, etc (even,
1018 * then odd register addresses) are paired to form a word. When set to 1, bytes
1019 * from register addresses are paired 1 and 2, 3 and 4, etc. (odd, then even
1020 * register addresses) are paired to form a word.
1022 * @param num Slave number (0-3)
1023 * @return Current word pair grouping order offset for specified slave
1024 * @see MPU6050_RA_I2C_SLV0_CTRL
1026 bool MPU6050::getSlaveWordGroupOffset(uint8_t num) {
1027 if (num > 3) return 0;
1028 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, buffer);
1031 /** Set word pair grouping order offset for the specified slave (0-3).
1032 * @param num Slave number (0-3)
1033 * @param enabled New word pair grouping order offset for specified slave
1034 * @see getSlaveWordGroupOffset()
1035 * @see MPU6050_RA_I2C_SLV0_CTRL
1037 void MPU6050::setSlaveWordGroupOffset(uint8_t num, bool enabled) {
1038 if (num > 3) return;
1039 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_GRP_BIT, enabled);
1041 /** Get number of bytes to read for the specified slave (0-3).
1042 * Specifies the number of bytes transferred to and from Slave 0. Clearing this
1043 * bit to 0 is equivalent to disabling the register by writing 0 to I2C_SLV0_EN.
1044 * @param num Slave number (0-3)
1045 * @return Number of bytes to read for specified slave
1046 * @see MPU6050_RA_I2C_SLV0_CTRL
1048 uint8_t MPU6050::getSlaveDataLength(uint8_t num) {
1049 if (num > 3) return 0;
1050 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, buffer);
1053 /** Set number of bytes to read for the specified slave (0-3).
1054 * @param num Slave number (0-3)
1055 * @param length Number of bytes to read for specified slave
1056 * @see getSlaveDataLength()
1057 * @see MPU6050_RA_I2C_SLV0_CTRL
1059 void MPU6050::setSlaveDataLength(uint8_t num, uint8_t length) {
1060 if (num > 3) return;
1061 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV0_CTRL + num*3, MPU6050_I2C_SLV_LEN_BIT, MPU6050_I2C_SLV_LEN_LENGTH, length);
1064 // I2C_SLV* registers (Slave 4)
1066 /** Get the I2C address of Slave 4.
1067 * Note that Bit 7 (MSB) controls read/write mode. If Bit 7 is set, it's a read
1068 * operation, and if it is cleared, then it's a write operation. The remaining
1069 * bits (6-0) are the 7-bit device address of the slave device.
1071 * @return Current address for Slave 4
1072 * @see getSlaveAddress()
1073 * @see MPU6050_RA_I2C_SLV4_ADDR
1075 uint8_t MPU6050::getSlave4Address() {
1076 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, buffer);
1079 /** Set the I2C address of Slave 4.
1080 * @param address New address for Slave 4
1081 * @see getSlave4Address()
1082 * @see MPU6050_RA_I2C_SLV4_ADDR
1084 void MPU6050::setSlave4Address(uint8_t address) {
1085 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_ADDR, address);
1087 /** Get the active internal register for the Slave 4.
1088 * Read/write operations for this slave will be done to whatever internal
1089 * register address is stored in this MPU register.
1091 * @return Current active register for Slave 4
1092 * @see MPU6050_RA_I2C_SLV4_REG
1094 uint8_t MPU6050::getSlave4Register() {
1095 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_REG, buffer);
1098 /** Set the active internal register for Slave 4.
1099 * @param reg New active register for Slave 4
1100 * @see getSlave4Register()
1101 * @see MPU6050_RA_I2C_SLV4_REG
1103 void MPU6050::setSlave4Register(uint8_t reg) {
1104 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_REG, reg);
1106 /** Set new byte to write to Slave 4.
1107 * This register stores the data to be written into the Slave 4. If I2C_SLV4_RW
1108 * is set 1 (set to read), this register has no effect.
1109 * @param data New byte to write to Slave 4
1110 * @see MPU6050_RA_I2C_SLV4_DO
1112 void MPU6050::setSlave4OutputByte(uint8_t data) {
1113 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV4_DO, data);
1115 /** Get the enabled value for the Slave 4.
1116 * When set to 1, this bit enables Slave 4 for data transfer operations. When
1117 * cleared to 0, this bit disables Slave 4 from data transfer operations.
1118 * @return Current enabled value for Slave 4
1119 * @see MPU6050_RA_I2C_SLV4_CTRL
1121 bool MPU6050::getSlave4Enabled() {
1122 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, buffer);
1125 /** Set the enabled value for Slave 4.
1126 * @param enabled New enabled value for Slave 4
1127 * @see getSlave4Enabled()
1128 * @see MPU6050_RA_I2C_SLV4_CTRL
1130 void MPU6050::setSlave4Enabled(bool enabled) {
1131 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_EN_BIT, enabled);
1133 /** Get the enabled value for Slave 4 transaction interrupts.
1134 * When set to 1, this bit enables the generation of an interrupt signal upon
1135 * completion of a Slave 4 transaction. When cleared to 0, this bit disables the
1136 * generation of an interrupt signal upon completion of a Slave 4 transaction.
1137 * The interrupt status can be observed in Register 54.
1139 * @return Current enabled value for Slave 4 transaction interrupts.
1140 * @see MPU6050_RA_I2C_SLV4_CTRL
1142 bool MPU6050::getSlave4InterruptEnabled() {
1143 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, buffer);
1146 /** Set the enabled value for Slave 4 transaction interrupts.
1147 * @param enabled New enabled value for Slave 4 transaction interrupts.
1148 * @see getSlave4InterruptEnabled()
1149 * @see MPU6050_RA_I2C_SLV4_CTRL
1151 void MPU6050::setSlave4InterruptEnabled(bool enabled) {
1152 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_INT_EN_BIT, enabled);
1154 /** Get write mode for Slave 4.
1155 * When set to 1, the transaction will read or write data only. When cleared to
1156 * 0, the transaction will write a register address prior to reading or writing
1157 * data. This should equal 0 when specifying the register address within the
1158 * Slave device to/from which the ensuing data transaction will take place.
1160 * @return Current write mode for Slave 4 (0 = register address + data, 1 = data only)
1161 * @see MPU6050_RA_I2C_SLV4_CTRL
1163 bool MPU6050::getSlave4WriteMode() {
1164 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, buffer);
1167 /** Set write mode for the Slave 4.
1168 * @param mode New write mode for Slave 4 (0 = register address + data, 1 = data only)
1169 * @see getSlave4WriteMode()
1170 * @see MPU6050_RA_I2C_SLV4_CTRL
1172 void MPU6050::setSlave4WriteMode(bool mode) {
1173 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_REG_DIS_BIT, mode);
1175 /** Get Slave 4 master delay value.
1176 * This configures the reduced access rate of I2C slaves relative to the Sample
1177 * Rate. When a slave's access rate is decreased relative to the Sample Rate,
1178 * the slave is accessed every:
1180 * 1 / (1 + I2C_MST_DLY) samples
1182 * This base Sample Rate in turn is determined by SMPLRT_DIV (register 25) and
1183 * DLPF_CFG (register 26). Whether a slave's access rate is reduced relative to
1184 * the Sample Rate is determined by I2C_MST_DELAY_CTRL (register 103). For
1185 * further information regarding the Sample Rate, please refer to register 25.
1187 * @return Current Slave 4 master delay value
1188 * @see MPU6050_RA_I2C_SLV4_CTRL
1190 uint8_t MPU6050::getSlave4MasterDelay() {
1191 I2Cdev::readBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, buffer);
1194 /** Set Slave 4 master delay value.
1195 * @param delay New Slave 4 master delay value
1196 * @see getSlave4MasterDelay()
1197 * @see MPU6050_RA_I2C_SLV4_CTRL
1199 void MPU6050::setSlave4MasterDelay(uint8_t delay) {
1200 I2Cdev::writeBits(devAddr, MPU6050_RA_I2C_SLV4_CTRL, MPU6050_I2C_SLV4_MST_DLY_BIT, MPU6050_I2C_SLV4_MST_DLY_LENGTH, delay);
1202 /** Get last available byte read from Slave 4.
1203 * This register stores the data read from Slave 4. This field is populated
1204 * after a read transaction.
1205 * @return Last available byte read from to Slave 4
1206 * @see MPU6050_RA_I2C_SLV4_DI
1208 uint8_t MPU6050::getSlate4InputByte() {
1209 I2Cdev::readByte(devAddr, MPU6050_RA_I2C_SLV4_DI, buffer);
1213 // I2C_MST_STATUS register
1215 /** Get FSYNC interrupt status.
1216 * This bit reflects the status of the FSYNC interrupt from an external device
1217 * into the MPU-60X0. This is used as a way to pass an external interrupt
1218 * through the MPU-60X0 to the host application processor. When set to 1, this
1219 * bit will cause an interrupt if FSYNC_INT_EN is asserted in INT_PIN_CFG
1221 * @return FSYNC interrupt status
1222 * @see MPU6050_RA_I2C_MST_STATUS
1224 bool MPU6050::getPassthroughStatus() {
1225 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_PASS_THROUGH_BIT, buffer);
1228 /** Get Slave 4 transaction done status.
1229 * Automatically sets to 1 when a Slave 4 transaction has completed. This
1230 * triggers an interrupt if the I2C_MST_INT_EN bit in the INT_ENABLE register
1231 * (Register 56) is asserted and if the SLV_4_DONE_INT bit is asserted in the
1232 * I2C_SLV4_CTRL register (Register 52).
1233 * @return Slave 4 transaction done status
1234 * @see MPU6050_RA_I2C_MST_STATUS
1236 bool MPU6050::getSlave4IsDone() {
1237 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_DONE_BIT, buffer);
1240 /** Get master arbitration lost status.
1241 * This bit automatically sets to 1 when the I2C Master has lost arbitration of
1242 * the auxiliary I2C bus (an error condition). This triggers an interrupt if the
1243 * I2C_MST_INT_EN bit in the INT_ENABLE register (Register 56) is asserted.
1244 * @return Master arbitration lost status
1245 * @see MPU6050_RA_I2C_MST_STATUS
1247 bool MPU6050::getLostArbitration() {
1248 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_LOST_ARB_BIT, buffer);
1251 /** Get Slave 4 NACK status.
1252 * This bit automatically sets to 1 when the I2C Master receives a NACK in a
1253 * transaction with Slave 4. This triggers an interrupt if the I2C_MST_INT_EN
1254 * bit in the INT_ENABLE register (Register 56) is asserted.
1255 * @return Slave 4 NACK interrupt status
1256 * @see MPU6050_RA_I2C_MST_STATUS
1258 bool MPU6050::getSlave4Nack() {
1259 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV4_NACK_BIT, buffer);
1262 /** Get Slave 3 NACK status.
1263 * This bit automatically sets to 1 when the I2C Master receives a NACK in a
1264 * transaction with Slave 3. This triggers an interrupt if the I2C_MST_INT_EN
1265 * bit in the INT_ENABLE register (Register 56) is asserted.
1266 * @return Slave 3 NACK interrupt status
1267 * @see MPU6050_RA_I2C_MST_STATUS
1269 bool MPU6050::getSlave3Nack() {
1270 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV3_NACK_BIT, buffer);
1273 /** Get Slave 2 NACK status.
1274 * This bit automatically sets to 1 when the I2C Master receives a NACK in a
1275 * transaction with Slave 2. This triggers an interrupt if the I2C_MST_INT_EN
1276 * bit in the INT_ENABLE register (Register 56) is asserted.
1277 * @return Slave 2 NACK interrupt status
1278 * @see MPU6050_RA_I2C_MST_STATUS
1280 bool MPU6050::getSlave2Nack() {
1281 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV2_NACK_BIT, buffer);
1284 /** Get Slave 1 NACK status.
1285 * This bit automatically sets to 1 when the I2C Master receives a NACK in a
1286 * transaction with Slave 1. This triggers an interrupt if the I2C_MST_INT_EN
1287 * bit in the INT_ENABLE register (Register 56) is asserted.
1288 * @return Slave 1 NACK interrupt status
1289 * @see MPU6050_RA_I2C_MST_STATUS
1291 bool MPU6050::getSlave1Nack() {
1292 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV1_NACK_BIT, buffer);
1295 /** Get Slave 0 NACK status.
1296 * This bit automatically sets to 1 when the I2C Master receives a NACK in a
1297 * transaction with Slave 0. This triggers an interrupt if the I2C_MST_INT_EN
1298 * bit in the INT_ENABLE register (Register 56) is asserted.
1299 * @return Slave 0 NACK interrupt status
1300 * @see MPU6050_RA_I2C_MST_STATUS
1302 bool MPU6050::getSlave0Nack() {
1303 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_STATUS, MPU6050_MST_I2C_SLV0_NACK_BIT, buffer);
1307 // INT_PIN_CFG register
1309 /** Get interrupt logic level mode.
1310 * Will be set 0 for active-high, 1 for active-low.
1311 * @return Current interrupt mode (0=active-high, 1=active-low)
1312 * @see MPU6050_RA_INT_PIN_CFG
1313 * @see MPU6050_INTCFG_INT_LEVEL_BIT
1315 bool MPU6050::getInterruptMode() {
1316 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, buffer);
1319 /** Set interrupt logic level mode.
1320 * @param mode New interrupt mode (0=active-high, 1=active-low)
1321 * @see getInterruptMode()
1322 * @see MPU6050_RA_INT_PIN_CFG
1323 * @see MPU6050_INTCFG_INT_LEVEL_BIT
1325 void MPU6050::setInterruptMode(bool mode) {
1326 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_LEVEL_BIT, mode);
1328 /** Get interrupt drive mode.
1329 * Will be set 0 for push-pull, 1 for open-drain.
1330 * @return Current interrupt drive mode (0=push-pull, 1=open-drain)
1331 * @see MPU6050_RA_INT_PIN_CFG
1332 * @see MPU6050_INTCFG_INT_OPEN_BIT
1334 bool MPU6050::getInterruptDrive() {
1335 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, buffer);
1338 /** Set interrupt drive mode.
1339 * @param drive New interrupt drive mode (0=push-pull, 1=open-drain)
1340 * @see getInterruptDrive()
1341 * @see MPU6050_RA_INT_PIN_CFG
1342 * @see MPU6050_INTCFG_INT_OPEN_BIT
1344 void MPU6050::setInterruptDrive(bool drive) {
1345 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_OPEN_BIT, drive);
1347 /** Get interrupt latch mode.
1348 * Will be set 0 for 50us-pulse, 1 for latch-until-int-cleared.
1349 * @return Current latch mode (0=50us-pulse, 1=latch-until-int-cleared)
1350 * @see MPU6050_RA_INT_PIN_CFG
1351 * @see MPU6050_INTCFG_LATCH_INT_EN_BIT
1353 bool MPU6050::getInterruptLatch() {
1354 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, buffer);
1357 /** Set interrupt latch mode.
1358 * @param latch New latch mode (0=50us-pulse, 1=latch-until-int-cleared)
1359 * @see getInterruptLatch()
1360 * @see MPU6050_RA_INT_PIN_CFG
1361 * @see MPU6050_INTCFG_LATCH_INT_EN_BIT
1363 void MPU6050::setInterruptLatch(bool latch) {
1364 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_LATCH_INT_EN_BIT, latch);
1366 /** Get interrupt latch clear mode.
1367 * Will be set 0 for status-read-only, 1 for any-register-read.
1368 * @return Current latch clear mode (0=status-read-only, 1=any-register-read)
1369 * @see MPU6050_RA_INT_PIN_CFG
1370 * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
1372 bool MPU6050::getInterruptLatchClear() {
1373 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, buffer);
1376 /** Set interrupt latch clear mode.
1377 * @param clear New latch clear mode (0=status-read-only, 1=any-register-read)
1378 * @see getInterruptLatchClear()
1379 * @see MPU6050_RA_INT_PIN_CFG
1380 * @see MPU6050_INTCFG_INT_RD_CLEAR_BIT
1382 void MPU6050::setInterruptLatchClear(bool clear) {
1383 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_INT_RD_CLEAR_BIT, clear);
1385 /** Get FSYNC interrupt logic level mode.
1386 * @return Current FSYNC interrupt mode (0=active-high, 1=active-low)
1387 * @see getFSyncInterruptMode()
1388 * @see MPU6050_RA_INT_PIN_CFG
1389 * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
1391 bool MPU6050::getFSyncInterruptLevel() {
1392 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, buffer);
1395 /** Set FSYNC interrupt logic level mode.
1396 * @param mode New FSYNC interrupt mode (0=active-high, 1=active-low)
1397 * @see getFSyncInterruptMode()
1398 * @see MPU6050_RA_INT_PIN_CFG
1399 * @see MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT
1401 void MPU6050::setFSyncInterruptLevel(bool level) {
1402 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_LEVEL_BIT, level);
1404 /** Get FSYNC pin interrupt enabled setting.
1405 * Will be set 0 for disabled, 1 for enabled.
1406 * @return Current interrupt enabled setting
1407 * @see MPU6050_RA_INT_PIN_CFG
1408 * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
1410 bool MPU6050::getFSyncInterruptEnabled() {
1411 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, buffer);
1414 /** Set FSYNC pin interrupt enabled setting.
1415 * @param enabled New FSYNC pin interrupt enabled setting
1416 * @see getFSyncInterruptEnabled()
1417 * @see MPU6050_RA_INT_PIN_CFG
1418 * @see MPU6050_INTCFG_FSYNC_INT_EN_BIT
1420 void MPU6050::setFSyncInterruptEnabled(bool enabled) {
1421 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_FSYNC_INT_EN_BIT, enabled);
1423 /** Get I2C bypass enabled status.
1424 * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
1425 * 0, the host application processor will be able to directly access the
1426 * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
1427 * application processor will not be able to directly access the auxiliary I2C
1428 * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
1430 * @return Current I2C bypass enabled status
1431 * @see MPU6050_RA_INT_PIN_CFG
1432 * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
1434 bool MPU6050::getI2CBypassEnabled() {
1435 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, buffer);
1438 /** Set I2C bypass enabled status.
1439 * When this bit is equal to 1 and I2C_MST_EN (Register 106 bit[5]) is equal to
1440 * 0, the host application processor will be able to directly access the
1441 * auxiliary I2C bus of the MPU-60X0. When this bit is equal to 0, the host
1442 * application processor will not be able to directly access the auxiliary I2C
1443 * bus of the MPU-60X0 regardless of the state of I2C_MST_EN (Register 106
1445 * @param enabled New I2C bypass enabled status
1446 * @see MPU6050_RA_INT_PIN_CFG
1447 * @see MPU6050_INTCFG_I2C_BYPASS_EN_BIT
1449 void MPU6050::setI2CBypassEnabled(bool enabled) {
1450 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_I2C_BYPASS_EN_BIT, enabled);
1452 /** Get reference clock output enabled status.
1453 * When this bit is equal to 1, a reference clock output is provided at the
1454 * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
1455 * further information regarding CLKOUT, please refer to the MPU-60X0 Product
1456 * Specification document.
1457 * @return Current reference clock output enabled status
1458 * @see MPU6050_RA_INT_PIN_CFG
1459 * @see MPU6050_INTCFG_CLKOUT_EN_BIT
1461 bool MPU6050::getClockOutputEnabled() {
1462 I2Cdev::readBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, buffer);
1465 /** Set reference clock output enabled status.
1466 * When this bit is equal to 1, a reference clock output is provided at the
1467 * CLKOUT pin. When this bit is equal to 0, the clock output is disabled. For
1468 * further information regarding CLKOUT, please refer to the MPU-60X0 Product
1469 * Specification document.
1470 * @param enabled New reference clock output enabled status
1471 * @see MPU6050_RA_INT_PIN_CFG
1472 * @see MPU6050_INTCFG_CLKOUT_EN_BIT
1474 void MPU6050::setClockOutputEnabled(bool enabled) {
1475 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_PIN_CFG, MPU6050_INTCFG_CLKOUT_EN_BIT, enabled);
1478 // INT_ENABLE register
1480 /** Get Free Fall interrupt enabled status.
1481 * Will be set 0 for disabled, 1 for enabled.
1482 * @return Current interrupt enabled status
1483 * @see MPU6050_RA_INT_ENABLE
1484 * @see MPU6050_INTERRUPT_FF_BIT
1486 bool MPU6050::getIntFreefallEnabled() {
1487 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, buffer);
1490 /** Set Free Fall interrupt enabled status.
1491 * @param enabled New interrupt enabled status
1492 * @see getIntFreefallEnabled()
1493 * @see MPU6050_RA_INT_ENABLE
1494 * @see MPU6050_INTERRUPT_FF_BIT
1496 void MPU6050::setIntFreefallEnabled(bool enabled) {
1497 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FF_BIT, enabled);
1499 /** Get Motion Detection interrupt enabled status.
1500 * Will be set 0 for disabled, 1 for enabled.
1501 * @return Current interrupt enabled status
1502 * @see MPU6050_RA_INT_ENABLE
1503 * @see MPU6050_INTERRUPT_MOT_BIT
1505 bool MPU6050::getIntMotionEnabled() {
1506 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, buffer);
1509 /** Set Motion Detection interrupt enabled status.
1510 * @param enabled New interrupt enabled status
1511 * @see getIntMotionEnabled()
1512 * @see MPU6050_RA_INT_ENABLE
1513 * @see MPU6050_INTERRUPT_MOT_BIT
1515 void MPU6050::setIntMotionEnabled(bool enabled) {
1516 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_MOT_BIT, enabled);
1518 /** Get Zero Motion Detection interrupt enabled status.
1519 * Will be set 0 for disabled, 1 for enabled.
1520 * @return Current interrupt enabled status
1521 * @see MPU6050_RA_INT_ENABLE
1522 * @see MPU6050_INTERRUPT_ZMOT_BIT
1524 bool MPU6050::getIntZeroMotionEnabled() {
1525 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
1528 /** Set Zero Motion Detection interrupt enabled status.
1529 * @param enabled New interrupt enabled status
1530 * @see getIntZeroMotionEnabled()
1531 * @see MPU6050_RA_INT_ENABLE
1532 * @see MPU6050_INTERRUPT_ZMOT_BIT
1534 void MPU6050::setIntZeroMotionEnabled(bool enabled) {
1535 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_ZMOT_BIT, enabled);
1537 /** Get FIFO Buffer Overflow interrupt enabled status.
1538 * Will be set 0 for disabled, 1 for enabled.
1539 * @return Current interrupt enabled status
1540 * @see MPU6050_RA_INT_ENABLE
1541 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
1543 bool MPU6050::getIntFIFOBufferOverflowEnabled() {
1544 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
1547 /** Set FIFO Buffer Overflow interrupt enabled status.
1548 * @param enabled New interrupt enabled status
1549 * @see getIntFIFOBufferOverflowEnabled()
1550 * @see MPU6050_RA_INT_ENABLE
1551 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
1553 void MPU6050::setIntFIFOBufferOverflowEnabled(bool enabled) {
1554 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, enabled);
1556 /** Get I2C Master interrupt enabled status.
1557 * This enables any of the I2C Master interrupt sources to generate an
1558 * interrupt. Will be set 0 for disabled, 1 for enabled.
1559 * @return Current interrupt enabled status
1560 * @see MPU6050_RA_INT_ENABLE
1561 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
1563 bool MPU6050::getIntI2CMasterEnabled() {
1564 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
1567 /** Set I2C Master interrupt enabled status.
1568 * @param enabled New interrupt enabled status
1569 * @see getIntI2CMasterEnabled()
1570 * @see MPU6050_RA_INT_ENABLE
1571 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
1573 void MPU6050::setIntI2CMasterEnabled(bool enabled) {
1574 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_I2C_MST_INT_BIT, enabled);
1576 /** Get Data Ready interrupt enabled setting.
1577 * This event occurs each time a write operation to all of the sensor registers
1578 * has been completed. Will be set 0 for disabled, 1 for enabled.
1579 * @return Current interrupt enabled status
1580 * @see MPU6050_RA_INT_ENABLE
1581 * @see MPU6050_INTERRUPT_DATA_RDY_BIT
1583 bool MPU6050::getIntDataReadyEnabled() {
1584 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
1587 /** Set Data Ready interrupt enabled status.
1588 * @param enabled New interrupt enabled status
1589 * @see getIntDataReadyEnabled()
1590 * @see MPU6050_RA_INT_CFG
1591 * @see MPU6050_INTERRUPT_DATA_RDY_BIT
1593 void MPU6050::setIntDataReadyEnabled(bool enabled) {
1594 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DATA_RDY_BIT, enabled);
1597 // INT_STATUS register
1599 /** Get Free Fall interrupt status.
1600 * This bit automatically sets to 1 when a Free Fall interrupt has been
1601 * generated. The bit clears to 0 after the register has been read.
1602 * @return Current interrupt status
1603 * @see MPU6050_RA_INT_STATUS
1604 * @see MPU6050_INTERRUPT_FF_BIT
1606 bool MPU6050::getIntFreefallStatus() {
1607 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FF_BIT, buffer);
1610 /** Get Motion Detection interrupt status.
1611 * This bit automatically sets to 1 when a Motion Detection interrupt has been
1612 * generated. The bit clears to 0 after the register has been read.
1613 * @return Current interrupt status
1614 * @see MPU6050_RA_INT_STATUS
1615 * @see MPU6050_INTERRUPT_MOT_BIT
1617 bool MPU6050::getIntMotionStatus() {
1618 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_MOT_BIT, buffer);
1621 /** Get Zero Motion Detection interrupt status.
1622 * This bit automatically sets to 1 when a Zero Motion Detection interrupt has
1623 * been generated. The bit clears to 0 after the register has been read.
1624 * @return Current interrupt status
1625 * @see MPU6050_RA_INT_STATUS
1626 * @see MPU6050_INTERRUPT_ZMOT_BIT
1628 bool MPU6050::getIntZeroMotionStatus() {
1629 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_ZMOT_BIT, buffer);
1632 /** Get FIFO Buffer Overflow interrupt status.
1633 * This bit automatically sets to 1 when a Free Fall interrupt has been
1634 * generated. The bit clears to 0 after the register has been read.
1635 * @return Current interrupt status
1636 * @see MPU6050_RA_INT_STATUS
1637 * @see MPU6050_INTERRUPT_FIFO_OFLOW_BIT
1639 bool MPU6050::getIntFIFOBufferOverflowStatus() {
1640 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_FIFO_OFLOW_BIT, buffer);
1643 /** Get I2C Master interrupt status.
1644 * This bit automatically sets to 1 when an I2C Master interrupt has been
1645 * generated. For a list of I2C Master interrupts, please refer to Register 54.
1646 * The bit clears to 0 after the register has been read.
1647 * @return Current interrupt status
1648 * @see MPU6050_RA_INT_STATUS
1649 * @see MPU6050_INTERRUPT_I2C_MST_INT_BIT
1651 bool MPU6050::getIntI2CMasterStatus() {
1652 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_I2C_MST_INT_BIT, buffer);
1655 /** Get Data Ready interrupt status.
1656 * This bit automatically sets to 1 when a Data Ready interrupt has been
1657 * generated. The bit clears to 0 after the register has been read.
1658 * @return Current interrupt status
1659 * @see MPU6050_RA_INT_STATUS
1660 * @see MPU6050_INTERRUPT_DATA_RDY_BIT
1662 bool MPU6050::getIntDataReadyStatus() {
1663 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DATA_RDY_BIT, buffer);
1667 // ACCEL_*OUT_* registers
1669 /** Get raw 9-axis motion sensor readings (accel/gyro/compass).
1670 * FUNCTION NOT FULLY IMPLEMENTED YET.
1671 * @param ax 16-bit signed integer container for accelerometer X-axis value
1672 * @param ay 16-bit signed integer container for accelerometer Y-axis value
1673 * @param az 16-bit signed integer container for accelerometer Z-axis value
1674 * @param gx 16-bit signed integer container for gyroscope X-axis value
1675 * @param gy 16-bit signed integer container for gyroscope Y-axis value
1676 * @param gz 16-bit signed integer container for gyroscope Z-axis value
1677 * @param mx 16-bit signed integer container for magnetometer X-axis value
1678 * @param my 16-bit signed integer container for magnetometer Y-axis value
1679 * @param mz 16-bit signed integer container for magnetometer Z-axis value
1681 * @see getAcceleration()
1682 * @see getRotation()
1683 * @see MPU6050_RA_ACCEL_XOUT_H
1685 void MPU6050::getMotion9(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz, int16_t* mx, int16_t* my, int16_t* mz) {
1686 getMotion6(ax, ay, az, gx, gy, gz);
1687 // TODO: magnetometer integration
1689 /** Get raw 6-axis motion sensor readings (accel/gyro).
1690 * Retrieves all currently available motion sensor values.
1691 * @param ax 16-bit signed integer container for accelerometer X-axis value
1692 * @param ay 16-bit signed integer container for accelerometer Y-axis value
1693 * @param az 16-bit signed integer container for accelerometer Z-axis value
1694 * @param gx 16-bit signed integer container for gyroscope X-axis value
1695 * @param gy 16-bit signed integer container for gyroscope Y-axis value
1696 * @param gz 16-bit signed integer container for gyroscope Z-axis value
1697 * @see getAcceleration()
1698 * @see getRotation()
1699 * @see MPU6050_RA_ACCEL_XOUT_H
1701 void MPU6050::getMotion6(int16_t* ax, int16_t* ay, int16_t* az, int16_t* gx, int16_t* gy, int16_t* gz) {
1702 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 14, buffer);
1703 *ax = (((int16_t)buffer[0]) << 8) | buffer[1];
1704 *ay = (((int16_t)buffer[2]) << 8) | buffer[3];
1705 *az = (((int16_t)buffer[4]) << 8) | buffer[5];
1706 *gx = (((int16_t)buffer[8]) << 8) | buffer[9];
1707 *gy = (((int16_t)buffer[10]) << 8) | buffer[11];
1708 *gz = (((int16_t)buffer[12]) << 8) | buffer[13];
1710 /** Get 3-axis accelerometer readings.
1711 * These registers store the most recent accelerometer measurements.
1712 * Accelerometer measurements are written to these registers at the Sample Rate
1713 * as defined in Register 25.
1715 * The accelerometer measurement registers, along with the temperature
1716 * measurement registers, gyroscope measurement registers, and external sensor
1717 * data registers, are composed of two sets of registers: an internal register
1718 * set and a user-facing read register set.
1720 * The data within the accelerometer sensors' internal register set is always
1721 * updated at the Sample Rate. Meanwhile, the user-facing read register set
1722 * duplicates the internal register set's data values whenever the serial
1723 * interface is idle. This guarantees that a burst read of sensor registers will
1724 * read measurements from the same sampling instant. Note that if burst reads
1725 * are not used, the user is responsible for ensuring a set of single byte reads
1726 * correspond to a single sampling instant by checking the Data Ready interrupt.
1728 * Each 16-bit accelerometer measurement has a full scale defined in ACCEL_FS
1729 * (Register 28). For each full scale setting, the accelerometers' sensitivity
1730 * per LSB in ACCEL_xOUT is shown in the table below:
1733 * AFS_SEL | Full Scale Range | LSB Sensitivity
1734 * --------+------------------+----------------
1735 * 0 | +/- 2g | 8192 LSB/mg
1736 * 1 | +/- 4g | 4096 LSB/mg
1737 * 2 | +/- 8g | 2048 LSB/mg
1738 * 3 | +/- 16g | 1024 LSB/mg
1741 * @param x 16-bit signed integer container for X-axis acceleration
1742 * @param y 16-bit signed integer container for Y-axis acceleration
1743 * @param z 16-bit signed integer container for Z-axis acceleration
1744 * @see MPU6050_RA_GYRO_XOUT_H
1746 void MPU6050::getAcceleration(int16_t* x, int16_t* y, int16_t* z) {
1747 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 6, buffer);
1748 *x = (((int16_t)buffer[0]) << 8) | buffer[1];
1749 *y = (((int16_t)buffer[2]) << 8) | buffer[3];
1750 *z = (((int16_t)buffer[4]) << 8) | buffer[5];
1752 /** Get X-axis accelerometer reading.
1753 * @return X-axis acceleration measurement in 16-bit 2's complement format
1755 * @see MPU6050_RA_ACCEL_XOUT_H
1757 int16_t MPU6050::getAccelerationX() {
1758 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_XOUT_H, 2, buffer);
1759 return (((int16_t)buffer[0]) << 8) | buffer[1];
1761 /** Get Y-axis accelerometer reading.
1762 * @return Y-axis acceleration measurement in 16-bit 2's complement format
1764 * @see MPU6050_RA_ACCEL_YOUT_H
1766 int16_t MPU6050::getAccelerationY() {
1767 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_YOUT_H, 2, buffer);
1768 return (((int16_t)buffer[0]) << 8) | buffer[1];
1770 /** Get Z-axis accelerometer reading.
1771 * @return Z-axis acceleration measurement in 16-bit 2's complement format
1773 * @see MPU6050_RA_ACCEL_ZOUT_H
1775 int16_t MPU6050::getAccelerationZ() {
1776 I2Cdev::readBytes(devAddr, MPU6050_RA_ACCEL_ZOUT_H, 2, buffer);
1777 return (((int16_t)buffer[0]) << 8) | buffer[1];
1780 // TEMP_OUT_* registers
1782 /** Get current internal temperature.
1783 * @return Temperature reading in 16-bit 2's complement format
1784 * @see MPU6050_RA_TEMP_OUT_H
1786 int16_t MPU6050::getTemperature() {
1787 I2Cdev::readBytes(devAddr, MPU6050_RA_TEMP_OUT_H, 2, buffer);
1788 return (((int16_t)buffer[0]) << 8) | buffer[1];
1791 // GYRO_*OUT_* registers
1793 /** Get 3-axis gyroscope readings.
1794 * These gyroscope measurement registers, along with the accelerometer
1795 * measurement registers, temperature measurement registers, and external sensor
1796 * data registers, are composed of two sets of registers: an internal register
1797 * set and a user-facing read register set.
1798 * The data within the gyroscope sensors' internal register set is always
1799 * updated at the Sample Rate. Meanwhile, the user-facing read register set
1800 * duplicates the internal register set's data values whenever the serial
1801 * interface is idle. This guarantees that a burst read of sensor registers will
1802 * read measurements from the same sampling instant. Note that if burst reads
1803 * are not used, the user is responsible for ensuring a set of single byte reads
1804 * correspond to a single sampling instant by checking the Data Ready interrupt.
1806 * Each 16-bit gyroscope measurement has a full scale defined in FS_SEL
1807 * (Register 27). For each full scale setting, the gyroscopes' sensitivity per
1808 * LSB in GYRO_xOUT is shown in the table below:
1811 * FS_SEL | Full Scale Range | LSB Sensitivity
1812 * -------+--------------------+----------------
1813 * 0 | +/- 250 degrees/s | 131 LSB/deg/s
1814 * 1 | +/- 500 degrees/s | 65.5 LSB/deg/s
1815 * 2 | +/- 1000 degrees/s | 32.8 LSB/deg/s
1816 * 3 | +/- 2000 degrees/s | 16.4 LSB/deg/s
1819 * @param x 16-bit signed integer container for X-axis rotation
1820 * @param y 16-bit signed integer container for Y-axis rotation
1821 * @param z 16-bit signed integer container for Z-axis rotation
1823 * @see MPU6050_RA_GYRO_XOUT_H
1825 void MPU6050::getRotation(int16_t* x, int16_t* y, int16_t* z) {
1826 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 6, buffer);
1827 *x = (((int16_t)buffer[0]) << 8) | buffer[1];
1828 *y = (((int16_t)buffer[2]) << 8) | buffer[3];
1829 *z = (((int16_t)buffer[4]) << 8) | buffer[5];
1831 /** Get X-axis gyroscope reading.
1832 * @return X-axis rotation measurement in 16-bit 2's complement format
1834 * @see MPU6050_RA_GYRO_XOUT_H
1836 int16_t MPU6050::getRotationX() {
1837 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_XOUT_H, 2, buffer);
1838 return (((int16_t)buffer[0]) << 8) | buffer[1];
1840 /** Get Y-axis gyroscope reading.
1841 * @return Y-axis rotation measurement in 16-bit 2's complement format
1843 * @see MPU6050_RA_GYRO_YOUT_H
1845 int16_t MPU6050::getRotationY() {
1846 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_YOUT_H, 2, buffer);
1847 return (((int16_t)buffer[0]) << 8) | buffer[1];
1849 /** Get Z-axis gyroscope reading.
1850 * @return Z-axis rotation measurement in 16-bit 2's complement format
1852 * @see MPU6050_RA_GYRO_ZOUT_H
1854 int16_t MPU6050::getRotationZ() {
1855 I2Cdev::readBytes(devAddr, MPU6050_RA_GYRO_ZOUT_H, 2, buffer);
1856 return (((int16_t)buffer[0]) << 8) | buffer[1];
1859 // EXT_SENS_DATA_* registers
1861 /** Read single byte from external sensor data register.
1862 * These registers store data read from external sensors by the Slave 0, 1, 2,
1863 * and 3 on the auxiliary I2C interface. Data read by Slave 4 is stored in
1864 * I2C_SLV4_DI (Register 53).
1866 * External sensor data is written to these registers at the Sample Rate as
1867 * defined in Register 25. This access rate can be reduced by using the Slave
1868 * Delay Enable registers (Register 103).
1870 * External sensor data registers, along with the gyroscope measurement
1871 * registers, accelerometer measurement registers, and temperature measurement
1872 * registers, are composed of two sets of registers: an internal register set
1873 * and a user-facing read register set.
1875 * The data within the external sensors' internal register set is always updated
1876 * at the Sample Rate (or the reduced access rate) whenever the serial interface
1877 * is idle. This guarantees that a burst read of sensor registers will read
1878 * measurements from the same sampling instant. Note that if burst reads are not
1879 * used, the user is responsible for ensuring a set of single byte reads
1880 * correspond to a single sampling instant by checking the Data Ready interrupt.
1882 * Data is placed in these external sensor data registers according to
1883 * I2C_SLV0_CTRL, I2C_SLV1_CTRL, I2C_SLV2_CTRL, and I2C_SLV3_CTRL (Registers 39,
1884 * 42, 45, and 48). When more than zero bytes are read (I2C_SLVx_LEN > 0) from
1885 * an enabled slave (I2C_SLVx_EN = 1), the slave is read at the Sample Rate (as
1886 * defined in Register 25) or delayed rate (if specified in Register 52 and
1887 * 103). During each Sample cycle, slave reads are performed in order of Slave
1888 * number. If all slaves are enabled with more than zero bytes to be read, the
1889 * order will be Slave 0, followed by Slave 1, Slave 2, and Slave 3.
1891 * Each enabled slave will have EXT_SENS_DATA registers associated with it by
1892 * number of bytes read (I2C_SLVx_LEN) in order of slave number, starting from
1893 * EXT_SENS_DATA_00. Note that this means enabling or disabling a slave may
1894 * change the higher numbered slaves' associated registers. Furthermore, if
1895 * fewer total bytes are being read from the external sensors as a result of
1896 * such a change, then the data remaining in the registers which no longer have
1897 * an associated slave device (i.e. high numbered registers) will remain in
1898 * these previously allocated registers unless reset.
1900 * If the sum of the read lengths of all SLVx transactions exceed the number of
1901 * available EXT_SENS_DATA registers, the excess bytes will be dropped. There
1902 * are 24 EXT_SENS_DATA registers and hence the total read lengths between all
1903 * the slaves cannot be greater than 24 or some bytes will be lost.
1905 * Note: Slave 4's behavior is distinct from that of Slaves 0-3. For further
1906 * information regarding the characteristics of Slave 4, please refer to
1907 * Registers 49 to 53.
1910 * Suppose that Slave 0 is enabled with 4 bytes to be read (I2C_SLV0_EN = 1 and
1911 * I2C_SLV0_LEN = 4) while Slave 1 is enabled with 2 bytes to be read so that
1912 * I2C_SLV1_EN = 1 and I2C_SLV1_LEN = 2. In such a situation, EXT_SENS_DATA _00
1913 * through _03 will be associated with Slave 0, while EXT_SENS_DATA _04 and 05
1914 * will be associated with Slave 1. If Slave 2 is enabled as well, registers
1915 * starting from EXT_SENS_DATA_06 will be allocated to Slave 2.
1917 * If Slave 2 is disabled while Slave 3 is enabled in this same situation, then
1918 * registers starting from EXT_SENS_DATA_06 will be allocated to Slave 3
1921 * REGISTER ALLOCATION FOR DYNAMIC DISABLE VS. NORMAL DISABLE:
1922 * If a slave is disabled at any time, the space initially allocated to the
1923 * slave in the EXT_SENS_DATA register, will remain associated with that slave.
1924 * This is to avoid dynamic adjustment of the register allocation.
1926 * The allocation of the EXT_SENS_DATA registers is recomputed only when (1) all
1927 * slaves are disabled, or (2) the I2C_MST_RST bit is set (Register 106).
1929 * This above is also true if one of the slaves gets NACKed and stops
1932 * @param position Starting position (0-23)
1933 * @return Byte read from register
1935 uint8_t MPU6050::getExternalSensorByte(int position) {
1936 I2Cdev::readByte(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, buffer);
1939 /** Read word (2 bytes) from external sensor data registers.
1940 * @param position Starting position (0-21)
1941 * @return Word read from register
1942 * @see getExternalSensorByte()
1944 uint16_t MPU6050::getExternalSensorWord(int position) {
1945 I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 2, buffer);
1946 return (((uint16_t)buffer[0]) << 8) | buffer[1];
1948 /** Read double word (4 bytes) from external sensor data registers.
1949 * @param position Starting position (0-20)
1950 * @return Double word read from registers
1951 * @see getExternalSensorByte()
1953 uint32_t MPU6050::getExternalSensorDWord(int position) {
1954 I2Cdev::readBytes(devAddr, MPU6050_RA_EXT_SENS_DATA_00 + position, 4, buffer);
1955 return (((uint32_t)buffer[0]) << 24) | (((uint32_t)buffer[1]) << 16) | (((uint16_t)buffer[2]) << 8) | buffer[3];
1958 // MOT_DETECT_STATUS register
1960 /** Get X-axis negative motion detection interrupt status.
1961 * @return Motion detection status
1962 * @see MPU6050_RA_MOT_DETECT_STATUS
1963 * @see MPU6050_MOTION_MOT_XNEG_BIT
1965 bool MPU6050::getXNegMotionDetected() {
1966 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XNEG_BIT, buffer);
1969 /** Get X-axis positive motion detection interrupt status.
1970 * @return Motion detection status
1971 * @see MPU6050_RA_MOT_DETECT_STATUS
1972 * @see MPU6050_MOTION_MOT_XPOS_BIT
1974 bool MPU6050::getXPosMotionDetected() {
1975 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_XPOS_BIT, buffer);
1978 /** Get Y-axis negative motion detection interrupt status.
1979 * @return Motion detection status
1980 * @see MPU6050_RA_MOT_DETECT_STATUS
1981 * @see MPU6050_MOTION_MOT_YNEG_BIT
1983 bool MPU6050::getYNegMotionDetected() {
1984 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YNEG_BIT, buffer);
1987 /** Get Y-axis positive motion detection interrupt status.
1988 * @return Motion detection status
1989 * @see MPU6050_RA_MOT_DETECT_STATUS
1990 * @see MPU6050_MOTION_MOT_YPOS_BIT
1992 bool MPU6050::getYPosMotionDetected() {
1993 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_YPOS_BIT, buffer);
1996 /** Get Z-axis negative motion detection interrupt status.
1997 * @return Motion detection status
1998 * @see MPU6050_RA_MOT_DETECT_STATUS
1999 * @see MPU6050_MOTION_MOT_ZNEG_BIT
2001 bool MPU6050::getZNegMotionDetected() {
2002 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZNEG_BIT, buffer);
2005 /** Get Z-axis positive motion detection interrupt status.
2006 * @return Motion detection status
2007 * @see MPU6050_RA_MOT_DETECT_STATUS
2008 * @see MPU6050_MOTION_MOT_ZPOS_BIT
2010 bool MPU6050::getZPosMotionDetected() {
2011 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZPOS_BIT, buffer);
2014 /** Get zero motion detection interrupt status.
2015 * @return Motion detection status
2016 * @see MPU6050_RA_MOT_DETECT_STATUS
2017 * @see MPU6050_MOTION_MOT_ZRMOT_BIT
2019 bool MPU6050::getZeroMotionDetected() {
2020 I2Cdev::readBit(devAddr, MPU6050_RA_MOT_DETECT_STATUS, MPU6050_MOTION_MOT_ZRMOT_BIT, buffer);
2024 // I2C_SLV*_DO register
2026 /** Write byte to Data Output container for specified slave.
2027 * This register holds the output data written into Slave when Slave is set to
2028 * write mode. For further information regarding Slave control, please
2029 * refer to Registers 37 to 39 and immediately following.
2030 * @param num Slave number (0-3)
2031 * @param data Byte to write
2032 * @see MPU6050_RA_I2C_SLV0_DO
2034 void MPU6050::setSlaveOutputByte(uint8_t num, uint8_t data) {
2035 if (num > 3) return;
2036 I2Cdev::writeByte(devAddr, MPU6050_RA_I2C_SLV0_DO + num, data);
2039 // I2C_MST_DELAY_CTRL register
2041 /** Get external data shadow delay enabled status.
2042 * This register is used to specify the timing of external sensor data
2043 * shadowing. When DELAY_ES_SHADOW is set to 1, shadowing of external
2044 * sensor data is delayed until all data has been received.
2045 * @return Current external data shadow delay enabled status.
2046 * @see MPU6050_RA_I2C_MST_DELAY_CTRL
2047 * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
2049 bool MPU6050::getExternalShadowDelayEnabled() {
2050 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, buffer);
2053 /** Set external data shadow delay enabled status.
2054 * @param enabled New external data shadow delay enabled status.
2055 * @see getExternalShadowDelayEnabled()
2056 * @see MPU6050_RA_I2C_MST_DELAY_CTRL
2057 * @see MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT
2059 void MPU6050::setExternalShadowDelayEnabled(bool enabled) {
2060 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, MPU6050_DELAYCTRL_DELAY_ES_SHADOW_BIT, enabled);
2062 /** Get slave delay enabled status.
2063 * When a particular slave delay is enabled, the rate of access for the that
2064 * slave device is reduced. When a slave's access rate is decreased relative to
2065 * the Sample Rate, the slave is accessed every:
2067 * 1 / (1 + I2C_MST_DLY) Samples
2069 * This base Sample Rate in turn is determined by SMPLRT_DIV (register * 25)
2070 * and DLPF_CFG (register 26).
2072 * For further information regarding I2C_MST_DLY, please refer to register 52.
2073 * For further information regarding the Sample Rate, please refer to register 25.
2075 * @param num Slave number (0-4)
2076 * @return Current slave delay enabled status.
2077 * @see MPU6050_RA_I2C_MST_DELAY_CTRL
2078 * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
2080 bool MPU6050::getSlaveDelayEnabled(uint8_t num) {
2081 // MPU6050_DELAYCTRL_I2C_SLV4_DLY_EN_BIT is 4, SLV3 is 3, etc.
2082 if (num > 4) return 0;
2083 I2Cdev::readBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, buffer);
2086 /** Set slave delay enabled status.
2087 * @param num Slave number (0-4)
2088 * @param enabled New slave delay enabled status.
2089 * @see MPU6050_RA_I2C_MST_DELAY_CTRL
2090 * @see MPU6050_DELAYCTRL_I2C_SLV0_DLY_EN_BIT
2092 void MPU6050::setSlaveDelayEnabled(uint8_t num, bool enabled) {
2093 I2Cdev::writeBit(devAddr, MPU6050_RA_I2C_MST_DELAY_CTRL, num, enabled);
2096 // SIGNAL_PATH_RESET register
2098 /** Reset gyroscope signal path.
2099 * The reset will revert the signal path analog to digital converters and
2100 * filters to their power up configurations.
2101 * @see MPU6050_RA_SIGNAL_PATH_RESET
2102 * @see MPU6050_PATHRESET_GYRO_RESET_BIT
2104 void MPU6050::resetGyroscopePath() {
2105 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_GYRO_RESET_BIT, true);
2107 /** Reset accelerometer signal path.
2108 * The reset will revert the signal path analog to digital converters and
2109 * filters to their power up configurations.
2110 * @see MPU6050_RA_SIGNAL_PATH_RESET
2111 * @see MPU6050_PATHRESET_ACCEL_RESET_BIT
2113 void MPU6050::resetAccelerometerPath() {
2114 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_ACCEL_RESET_BIT, true);
2116 /** Reset temperature sensor signal path.
2117 * The reset will revert the signal path analog to digital converters and
2118 * filters to their power up configurations.
2119 * @see MPU6050_RA_SIGNAL_PATH_RESET
2120 * @see MPU6050_PATHRESET_TEMP_RESET_BIT
2122 void MPU6050::resetTemperaturePath() {
2123 I2Cdev::writeBit(devAddr, MPU6050_RA_SIGNAL_PATH_RESET, MPU6050_PATHRESET_TEMP_RESET_BIT, true);
2126 // MOT_DETECT_CTRL register
2128 /** Get accelerometer power-on delay.
2129 * The accelerometer data path provides samples to the sensor registers, Motion
2130 * detection, Zero Motion detection, and Free Fall detection modules. The
2131 * signal path contains filters which must be flushed on wake-up with new
2132 * samples before the detection modules begin operations. The default wake-up
2133 * delay, of 4ms can be lengthened by up to 3ms. This additional delay is
2134 * specified in ACCEL_ON_DELAY in units of 1 LSB = 1 ms. The user may select
2135 * any value above zero unless instructed otherwise by InvenSense. Please refer
2136 * to Section 8 of the MPU-6000/MPU-6050 Product Specification document for
2137 * further information regarding the detection modules.
2138 * @return Current accelerometer power-on delay
2139 * @see MPU6050_RA_MOT_DETECT_CTRL
2140 * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
2142 uint8_t MPU6050::getAccelerometerPowerOnDelay() {
2143 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, buffer);
2146 /** Set accelerometer power-on delay.
2147 * @param delay New accelerometer power-on delay (0-3)
2148 * @see getAccelerometerPowerOnDelay()
2149 * @see MPU6050_RA_MOT_DETECT_CTRL
2150 * @see MPU6050_DETECT_ACCEL_ON_DELAY_BIT
2152 void MPU6050::setAccelerometerPowerOnDelay(uint8_t delay) {
2153 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_ACCEL_ON_DELAY_BIT, MPU6050_DETECT_ACCEL_ON_DELAY_LENGTH, delay);
2155 /** Get Free Fall detection counter decrement configuration.
2156 * Detection is registered by the Free Fall detection module after accelerometer
2157 * measurements meet their respective threshold conditions over a specified
2158 * number of samples. When the threshold conditions are met, the corresponding
2159 * detection counter increments by 1. The user may control the rate at which the
2160 * detection counter decrements when the threshold condition is not met by
2161 * configuring FF_COUNT. The decrement rate can be set according to the
2165 * FF_COUNT | Counter Decrement
2166 * ---------+------------------
2173 * When FF_COUNT is configured to 0 (reset), any non-qualifying sample will
2174 * reset the counter to 0. For further information on Free Fall detection,
2175 * please refer to Registers 29 to 32.
2177 * @return Current decrement configuration
2178 * @see MPU6050_RA_MOT_DETECT_CTRL
2179 * @see MPU6050_DETECT_FF_COUNT_BIT
2181 uint8_t MPU6050::getFreefallDetectionCounterDecrement() {
2182 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, buffer);
2185 /** Set Free Fall detection counter decrement configuration.
2186 * @param decrement New decrement configuration value
2187 * @see getFreefallDetectionCounterDecrement()
2188 * @see MPU6050_RA_MOT_DETECT_CTRL
2189 * @see MPU6050_DETECT_FF_COUNT_BIT
2191 void MPU6050::setFreefallDetectionCounterDecrement(uint8_t decrement) {
2192 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_FF_COUNT_BIT, MPU6050_DETECT_FF_COUNT_LENGTH, decrement);
2194 /** Get Motion detection counter decrement configuration.
2195 * Detection is registered by the Motion detection module after accelerometer
2196 * measurements meet their respective threshold conditions over a specified
2197 * number of samples. When the threshold conditions are met, the corresponding
2198 * detection counter increments by 1. The user may control the rate at which the
2199 * detection counter decrements when the threshold condition is not met by
2200 * configuring MOT_COUNT. The decrement rate can be set according to the
2204 * MOT_COUNT | Counter Decrement
2205 * ----------+------------------
2212 * When MOT_COUNT is configured to 0 (reset), any non-qualifying sample will
2213 * reset the counter to 0. For further information on Motion detection,
2214 * please refer to Registers 29 to 32.
2217 uint8_t MPU6050::getMotionDetectionCounterDecrement() {
2218 I2Cdev::readBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, buffer);
2221 /** Set Motion detection counter decrement configuration.
2222 * @param decrement New decrement configuration value
2223 * @see getMotionDetectionCounterDecrement()
2224 * @see MPU6050_RA_MOT_DETECT_CTRL
2225 * @see MPU6050_DETECT_MOT_COUNT_BIT
2227 void MPU6050::setMotionDetectionCounterDecrement(uint8_t decrement) {
2228 I2Cdev::writeBits(devAddr, MPU6050_RA_MOT_DETECT_CTRL, MPU6050_DETECT_MOT_COUNT_BIT, MPU6050_DETECT_MOT_COUNT_LENGTH, decrement);
2231 // USER_CTRL register
2233 /** Get FIFO enabled status.
2234 * When this bit is set to 0, the FIFO buffer is disabled. The FIFO buffer
2235 * cannot be written to or read from while disabled. The FIFO buffer's state
2236 * does not change unless the MPU-60X0 is power cycled.
2237 * @return Current FIFO enabled status
2238 * @see MPU6050_RA_USER_CTRL
2239 * @see MPU6050_USERCTRL_FIFO_EN_BIT
2241 bool MPU6050::getFIFOEnabled() {
2242 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, buffer);
2245 /** Set FIFO enabled status.
2246 * @param enabled New FIFO enabled status
2247 * @see getFIFOEnabled()
2248 * @see MPU6050_RA_USER_CTRL
2249 * @see MPU6050_USERCTRL_FIFO_EN_BIT
2251 void MPU6050::setFIFOEnabled(bool enabled) {
2252 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_EN_BIT, enabled);
2254 /** Get I2C Master Mode enabled status.
2255 * When this mode is enabled, the MPU-60X0 acts as the I2C Master to the
2256 * external sensor slave devices on the auxiliary I2C bus. When this bit is
2257 * cleared to 0, the auxiliary I2C bus lines (AUX_DA and AUX_CL) are logically
2258 * driven by the primary I2C bus (SDA and SCL). This is a precondition to
2259 * enabling Bypass Mode. For further information regarding Bypass Mode, please
2260 * refer to Register 55.
2261 * @return Current I2C Master Mode enabled status
2262 * @see MPU6050_RA_USER_CTRL
2263 * @see MPU6050_USERCTRL_I2C_MST_EN_BIT
2265 bool MPU6050::getI2CMasterModeEnabled() {
2266 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, buffer);
2269 /** Set I2C Master Mode enabled status.
2270 * @param enabled New I2C Master Mode enabled status
2271 * @see getI2CMasterModeEnabled()
2272 * @see MPU6050_RA_USER_CTRL
2273 * @see MPU6050_USERCTRL_I2C_MST_EN_BIT
2275 void MPU6050::setI2CMasterModeEnabled(bool enabled) {
2276 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_EN_BIT, enabled);
2278 /** Switch from I2C to SPI mode (MPU-6000 only)
2279 * If this is set, the primary SPI interface will be enabled in place of the
2280 * disabled primary I2C interface.
2282 void MPU6050::switchSPIEnabled(bool enabled) {
2283 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_IF_DIS_BIT, enabled);
2286 * This bit resets the FIFO buffer when set to 1 while FIFO_EN equals 0. This
2287 * bit automatically clears to 0 after the reset has been triggered.
2288 * @see MPU6050_RA_USER_CTRL
2289 * @see MPU6050_USERCTRL_FIFO_RESET_BIT
2291 void MPU6050::resetFIFO() {
2292 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_FIFO_RESET_BIT, true);
2294 /** Reset the I2C Master.
2295 * This bit resets the I2C Master when set to 1 while I2C_MST_EN equals 0.
2296 * This bit automatically clears to 0 after the reset has been triggered.
2297 * @see MPU6050_RA_USER_CTRL
2298 * @see MPU6050_USERCTRL_I2C_MST_RESET_BIT
2300 void MPU6050::resetI2CMaster() {
2301 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_I2C_MST_RESET_BIT, true);
2303 /** Reset all sensor registers and signal paths.
2304 * When set to 1, this bit resets the signal paths for all sensors (gyroscopes,
2305 * accelerometers, and temperature sensor). This operation will also clear the
2306 * sensor registers. This bit automatically clears to 0 after the reset has been
2309 * When resetting only the signal path (and not the sensor registers), please
2310 * use Register 104, SIGNAL_PATH_RESET.
2312 * @see MPU6050_RA_USER_CTRL
2313 * @see MPU6050_USERCTRL_SIG_COND_RESET_BIT
2315 void MPU6050::resetSensors() {
2316 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_SIG_COND_RESET_BIT, true);
2319 // PWR_MGMT_1 register
2321 /** Trigger a full device reset.
2322 * A small delay of ~50ms may be desirable after triggering a reset.
2323 * @see MPU6050_RA_PWR_MGMT_1
2324 * @see MPU6050_PWR1_DEVICE_RESET_BIT
2326 void MPU6050::reset() {
2327 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_DEVICE_RESET_BIT, true);
2329 /** Get sleep mode status.
2330 * Setting the SLEEP bit in the register puts the device into very low power
2331 * sleep mode. In this mode, only the serial interface and internal registers
2332 * remain active, allowing for a very low standby current. Clearing this bit
2333 * puts the device back into normal mode. To save power, the individual standby
2334 * selections for each of the gyros should be used if any gyro axis is not used
2335 * by the application.
2336 * @return Current sleep mode enabled status
2337 * @see MPU6050_RA_PWR_MGMT_1
2338 * @see MPU6050_PWR1_SLEEP_BIT
2340 bool MPU6050::getSleepEnabled() {
2341 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, buffer);
2344 /** Set sleep mode status.
2345 * @param enabled New sleep mode enabled status
2346 * @see getSleepEnabled()
2347 * @see MPU6050_RA_PWR_MGMT_1
2348 * @see MPU6050_PWR1_SLEEP_BIT
2350 void MPU6050::setSleepEnabled(bool enabled) {
2351 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_SLEEP_BIT, enabled);
2353 /** Get wake cycle enabled status.
2354 * When this bit is set to 1 and SLEEP is disabled, the MPU-60X0 will cycle
2355 * between sleep mode and waking up to take a single sample of data from active
2356 * sensors at a rate determined by LP_WAKE_CTRL (register 108).
2357 * @return Current sleep mode enabled status
2358 * @see MPU6050_RA_PWR_MGMT_1
2359 * @see MPU6050_PWR1_CYCLE_BIT
2361 bool MPU6050::getWakeCycleEnabled() {
2362 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, buffer);
2365 /** Set wake cycle enabled status.
2366 * @param enabled New sleep mode enabled status
2367 * @see getWakeCycleEnabled()
2368 * @see MPU6050_RA_PWR_MGMT_1
2369 * @see MPU6050_PWR1_CYCLE_BIT
2371 void MPU6050::setWakeCycleEnabled(bool enabled) {
2372 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CYCLE_BIT, enabled);
2374 /** Get temperature sensor enabled status.
2375 * Control the usage of the internal temperature sensor.
2377 * Note: this register stores the *disabled* value, but for consistency with the
2378 * rest of the code, the function is named and used with standard true/false
2379 * values to indicate whether the sensor is enabled or disabled, respectively.
2381 * @return Current temperature sensor enabled status
2382 * @see MPU6050_RA_PWR_MGMT_1
2383 * @see MPU6050_PWR1_TEMP_DIS_BIT
2385 bool MPU6050::getTempSensorEnabled() {
2386 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, buffer);
2387 return buffer[0] == 0; // 1 is actually disabled here
2389 /** Set temperature sensor enabled status.
2390 * Note: this register stores the *disabled* value, but for consistency with the
2391 * rest of the code, the function is named and used with standard true/false
2392 * values to indicate whether the sensor is enabled or disabled, respectively.
2394 * @param enabled New temperature sensor enabled status
2395 * @see getTempSensorEnabled()
2396 * @see MPU6050_RA_PWR_MGMT_1
2397 * @see MPU6050_PWR1_TEMP_DIS_BIT
2399 void MPU6050::setTempSensorEnabled(bool enabled) {
2400 // 1 is actually disabled here
2401 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_TEMP_DIS_BIT, !enabled);
2403 /** Get clock source setting.
2404 * @return Current clock source setting
2405 * @see MPU6050_RA_PWR_MGMT_1
2406 * @see MPU6050_PWR1_CLKSEL_BIT
2407 * @see MPU6050_PWR1_CLKSEL_LENGTH
2409 uint8_t MPU6050::getClockSource() {
2410 I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, buffer);
2413 /** Set clock source setting.
2414 * An internal 8MHz oscillator, gyroscope based clock, or external sources can
2415 * be selected as the MPU-60X0 clock source. When the internal 8 MHz oscillator
2416 * or an external source is chosen as the clock source, the MPU-60X0 can operate
2417 * in low power modes with the gyroscopes disabled.
2419 * Upon power up, the MPU-60X0 clock source defaults to the internal oscillator.
2420 * However, it is highly recommended that the device be configured to use one of
2421 * the gyroscopes (or an external clock source) as the clock reference for
2422 * improved stability. The clock source can be selected according to the following table:
2425 * CLK_SEL | Clock Source
2426 * --------+--------------------------------------
2427 * 0 | Internal oscillator
2428 * 1 | PLL with X Gyro reference
2429 * 2 | PLL with Y Gyro reference
2430 * 3 | PLL with Z Gyro reference
2431 * 4 | PLL with external 32.768kHz reference
2432 * 5 | PLL with external 19.2MHz reference
2434 * 7 | Stops the clock and keeps the timing generator in reset
2437 * @param source New clock source setting
2438 * @see getClockSource()
2439 * @see MPU6050_RA_PWR_MGMT_1
2440 * @see MPU6050_PWR1_CLKSEL_BIT
2441 * @see MPU6050_PWR1_CLKSEL_LENGTH
2443 void MPU6050::setClockSource(uint8_t source) {
2444 I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_1, MPU6050_PWR1_CLKSEL_BIT, MPU6050_PWR1_CLKSEL_LENGTH, source);
2447 // PWR_MGMT_2 register
2449 /** Get wake frequency in Accel-Only Low Power Mode.
2450 * The MPU-60X0 can be put into Accerlerometer Only Low Power Mode by setting
2451 * PWRSEL to 1 in the Power Management 1 register (Register 107). In this mode,
2452 * the device will power off all devices except for the primary I2C interface,
2453 * waking only the accelerometer at fixed intervals to take a single
2454 * measurement. The frequency of wake-ups can be configured with LP_WAKE_CTRL
2458 * LP_WAKE_CTRL | Wake-up Frequency
2459 * -------------+------------------
2466 * For further information regarding the MPU-60X0's power modes, please refer to
2469 * @return Current wake frequency
2470 * @see MPU6050_RA_PWR_MGMT_2
2472 uint8_t MPU6050::getWakeFrequency() {
2473 I2Cdev::readBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, buffer);
2476 /** Set wake frequency in Accel-Only Low Power Mode.
2477 * @param frequency New wake frequency
2478 * @see MPU6050_RA_PWR_MGMT_2
2480 void MPU6050::setWakeFrequency(uint8_t frequency) {
2481 I2Cdev::writeBits(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_LP_WAKE_CTRL_BIT, MPU6050_PWR2_LP_WAKE_CTRL_LENGTH, frequency);
2484 /** Get X-axis accelerometer standby enabled status.
2485 * If enabled, the X-axis will not gather or report data (or use power).
2486 * @return Current X-axis standby enabled status
2487 * @see MPU6050_RA_PWR_MGMT_2
2488 * @see MPU6050_PWR2_STBY_XA_BIT
2490 bool MPU6050::getStandbyXAccelEnabled() {
2491 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, buffer);
2494 /** Set X-axis accelerometer standby enabled status.
2495 * @param New X-axis standby enabled status
2496 * @see getStandbyXAccelEnabled()
2497 * @see MPU6050_RA_PWR_MGMT_2
2498 * @see MPU6050_PWR2_STBY_XA_BIT
2500 void MPU6050::setStandbyXAccelEnabled(bool enabled) {
2501 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XA_BIT, enabled);
2503 /** Get Y-axis accelerometer standby enabled status.
2504 * If enabled, the Y-axis will not gather or report data (or use power).
2505 * @return Current Y-axis standby enabled status
2506 * @see MPU6050_RA_PWR_MGMT_2
2507 * @see MPU6050_PWR2_STBY_YA_BIT
2509 bool MPU6050::getStandbyYAccelEnabled() {
2510 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, buffer);
2513 /** Set Y-axis accelerometer standby enabled status.
2514 * @param New Y-axis standby enabled status
2515 * @see getStandbyYAccelEnabled()
2516 * @see MPU6050_RA_PWR_MGMT_2
2517 * @see MPU6050_PWR2_STBY_YA_BIT
2519 void MPU6050::setStandbyYAccelEnabled(bool enabled) {
2520 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YA_BIT, enabled);
2522 /** Get Z-axis accelerometer standby enabled status.
2523 * If enabled, the Z-axis will not gather or report data (or use power).
2524 * @return Current Z-axis standby enabled status
2525 * @see MPU6050_RA_PWR_MGMT_2
2526 * @see MPU6050_PWR2_STBY_ZA_BIT
2528 bool MPU6050::getStandbyZAccelEnabled() {
2529 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, buffer);
2532 /** Set Z-axis accelerometer standby enabled status.
2533 * @param New Z-axis standby enabled status
2534 * @see getStandbyZAccelEnabled()
2535 * @see MPU6050_RA_PWR_MGMT_2
2536 * @see MPU6050_PWR2_STBY_ZA_BIT
2538 void MPU6050::setStandbyZAccelEnabled(bool enabled) {
2539 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZA_BIT, enabled);
2541 /** Get X-axis gyroscope standby enabled status.
2542 * If enabled, the X-axis will not gather or report data (or use power).
2543 * @return Current X-axis standby enabled status
2544 * @see MPU6050_RA_PWR_MGMT_2
2545 * @see MPU6050_PWR2_STBY_XG_BIT
2547 bool MPU6050::getStandbyXGyroEnabled() {
2548 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, buffer);
2551 /** Set X-axis gyroscope standby enabled status.
2552 * @param New X-axis standby enabled status
2553 * @see getStandbyXGyroEnabled()
2554 * @see MPU6050_RA_PWR_MGMT_2
2555 * @see MPU6050_PWR2_STBY_XG_BIT
2557 void MPU6050::setStandbyXGyroEnabled(bool enabled) {
2558 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_XG_BIT, enabled);
2560 /** Get Y-axis gyroscope standby enabled status.
2561 * If enabled, the Y-axis will not gather or report data (or use power).
2562 * @return Current Y-axis standby enabled status
2563 * @see MPU6050_RA_PWR_MGMT_2
2564 * @see MPU6050_PWR2_STBY_YG_BIT
2566 bool MPU6050::getStandbyYGyroEnabled() {
2567 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, buffer);
2570 /** Set Y-axis gyroscope standby enabled status.
2571 * @param New Y-axis standby enabled status
2572 * @see getStandbyYGyroEnabled()
2573 * @see MPU6050_RA_PWR_MGMT_2
2574 * @see MPU6050_PWR2_STBY_YG_BIT
2576 void MPU6050::setStandbyYGyroEnabled(bool enabled) {
2577 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_YG_BIT, enabled);
2579 /** Get Z-axis gyroscope standby enabled status.
2580 * If enabled, the Z-axis will not gather or report data (or use power).
2581 * @return Current Z-axis standby enabled status
2582 * @see MPU6050_RA_PWR_MGMT_2
2583 * @see MPU6050_PWR2_STBY_ZG_BIT
2585 bool MPU6050::getStandbyZGyroEnabled() {
2586 I2Cdev::readBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, buffer);
2589 /** Set Z-axis gyroscope standby enabled status.
2590 * @param New Z-axis standby enabled status
2591 * @see getStandbyZGyroEnabled()
2592 * @see MPU6050_RA_PWR_MGMT_2
2593 * @see MPU6050_PWR2_STBY_ZG_BIT
2595 void MPU6050::setStandbyZGyroEnabled(bool enabled) {
2596 I2Cdev::writeBit(devAddr, MPU6050_RA_PWR_MGMT_2, MPU6050_PWR2_STBY_ZG_BIT, enabled);
2599 // FIFO_COUNT* registers
2601 /** Get current FIFO buffer size.
2602 * This value indicates the number of bytes stored in the FIFO buffer. This
2603 * number is in turn the number of bytes that can be read from the FIFO buffer
2604 * and it is directly proportional to the number of samples available given the
2605 * set of sensor data bound to be stored in the FIFO (register 35 and 36).
2606 * @return Current FIFO buffer size
2608 uint16_t MPU6050::getFIFOCount() {
2609 I2Cdev::readBytes(devAddr, MPU6050_RA_FIFO_COUNTH, 2, buffer);
2610 return (((uint16_t)buffer[0]) << 8) | buffer[1];
2613 // FIFO_R_W register
2615 /** Get byte from FIFO buffer.
2616 * This register is used to read and write data from the FIFO buffer. Data is
2617 * written to the FIFO in order of register number (from lowest to highest). If
2618 * all the FIFO enable flags (see below) are enabled and all External Sensor
2619 * Data registers (Registers 73 to 96) are associated with a Slave device, the
2620 * contents of registers 59 through 96 will be written in order at the Sample
2623 * The contents of the sensor data registers (Registers 59 to 96) are written
2624 * into the FIFO buffer when their corresponding FIFO enable flags are set to 1
2625 * in FIFO_EN (Register 35). An additional flag for the sensor data registers
2626 * associated with I2C Slave 3 can be found in I2C_MST_CTRL (Register 36).
2628 * If the FIFO buffer has overflowed, the status bit FIFO_OFLOW_INT is
2629 * automatically set to 1. This bit is located in INT_STATUS (Register 58).
2630 * When the FIFO buffer has overflowed, the oldest data will be lost and new
2631 * data will be written to the FIFO.
2633 * If the FIFO buffer is empty, reading this register will return the last byte
2634 * that was previously read from the FIFO until new data is available. The user
2635 * should check FIFO_COUNT to ensure that the FIFO buffer is not read when
2638 * @return Byte from FIFO buffer
2640 uint8_t MPU6050::getFIFOByte() {
2641 I2Cdev::readByte(devAddr, MPU6050_RA_FIFO_R_W, buffer);
2644 /** Write byte to FIFO buffer.
2645 * @see getFIFOByte()
2646 * @see MPU6050_RA_FIFO_R_W
2648 void MPU6050::setFIFOByte(uint8_t data) {
2649 I2Cdev::writeByte(devAddr, MPU6050_RA_FIFO_R_W, data);
2652 // WHO_AM_I register
2655 * This register is used to verify the identity of the device (0b110100).
2656 * @return Device ID (should be 0x68, 104 dec, 150 oct)
2657 * @see MPU6050_RA_WHO_AM_I
2658 * @see MPU6050_WHO_AM_I_BIT
2659 * @see MPU6050_WHO_AM_I_LENGTH
2661 uint8_t MPU6050::getDeviceID() {
2662 I2Cdev::readBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, buffer);
2666 * Write a new ID into the WHO_AM_I register (no idea why this should ever be
2667 * necessary though).
2668 * @param id New device ID to set.
2669 * @see getDeviceID()
2670 * @see MPU6050_RA_WHO_AM_I
2671 * @see MPU6050_WHO_AM_I_BIT
2672 * @see MPU6050_WHO_AM_I_LENGTH
2674 void MPU6050::setDeviceID(uint8_t id) {
2675 I2Cdev::writeBits(devAddr, MPU6050_RA_WHO_AM_I, MPU6050_WHO_AM_I_BIT, MPU6050_WHO_AM_I_LENGTH, id);
2678 // ======== UNDOCUMENTED/DMP REGISTERS/METHODS ========
2680 // XG_OFFS_TC register
2682 int8_t MPU6050::getXGyroOffset() {
2683 I2Cdev::readBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
2686 void MPU6050::setXGyroOffset(int8_t offset) {
2687 I2Cdev::writeBits(devAddr, MPU6050_RA_XG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
2690 // YG_OFFS_TC register
2692 int8_t MPU6050::getYGyroOffset() {
2693 I2Cdev::readBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
2696 void MPU6050::setYGyroOffset(int8_t offset) {
2697 I2Cdev::writeBits(devAddr, MPU6050_RA_YG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
2700 // ZG_OFFS_TC register
2702 int8_t MPU6050::getZGyroOffset() {
2703 I2Cdev::readBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, buffer);
2706 void MPU6050::setZGyroOffset(int8_t offset) {
2707 I2Cdev::writeBits(devAddr, MPU6050_RA_ZG_OFFS_TC, MPU6050_TC_OFFSET_BIT, MPU6050_TC_OFFSET_LENGTH, offset);
2710 // X_FINE_GAIN register
2712 int8_t MPU6050::getXFineGain() {
2713 I2Cdev::readByte(devAddr, MPU6050_RA_X_FINE_GAIN, buffer);
2716 void MPU6050::setXFineGain(int8_t gain) {
2717 I2Cdev::writeByte(devAddr, MPU6050_RA_X_FINE_GAIN, gain);
2720 // Y_FINE_GAIN register
2722 int8_t MPU6050::getYFineGain() {
2723 I2Cdev::readByte(devAddr, MPU6050_RA_Y_FINE_GAIN, buffer);
2726 void MPU6050::setYFineGain(int8_t gain) {
2727 I2Cdev::writeByte(devAddr, MPU6050_RA_Y_FINE_GAIN, gain);
2730 // Z_FINE_GAIN register
2732 int8_t MPU6050::getZFineGain() {
2733 I2Cdev::readByte(devAddr, MPU6050_RA_Z_FINE_GAIN, buffer);
2736 void MPU6050::setZFineGain(int8_t gain) {
2737 I2Cdev::writeByte(devAddr, MPU6050_RA_Z_FINE_GAIN, gain);
2740 // XA_OFFS_* registers
2742 int16_t MPU6050::getXAccelOffset() {
2743 I2Cdev::readBytes(devAddr, MPU6050_RA_XA_OFFS_H, 2, buffer);
2744 return (((int16_t)buffer[0]) << 8) | buffer[1];
2746 void MPU6050::setXAccelOffset(int16_t offset) {
2747 I2Cdev::writeWord(devAddr, MPU6050_RA_XA_OFFS_H, offset);
2750 // YA_OFFS_* register
2752 int16_t MPU6050::getYAccelOffset() {
2753 I2Cdev::readBytes(devAddr, MPU6050_RA_YA_OFFS_H, 2, buffer);
2754 return (((int16_t)buffer[0]) << 8) | buffer[1];
2756 void MPU6050::setYAccelOffset(int16_t offset) {
2757 I2Cdev::writeWord(devAddr, MPU6050_RA_YA_OFFS_H, offset);
2760 // ZA_OFFS_* register
2762 int16_t MPU6050::getZAccelOffset() {
2763 I2Cdev::readBytes(devAddr, MPU6050_RA_ZA_OFFS_H, 2, buffer);
2764 return (((int16_t)buffer[0]) << 8) | buffer[1];
2766 void MPU6050::setZAccelOffset(int16_t offset) {
2767 I2Cdev::writeWord(devAddr, MPU6050_RA_ZA_OFFS_H, offset);
2770 // XG_OFFS_USR* registers
2772 int16_t MPU6050::getXGyroOffsetUser() {
2773 I2Cdev::readBytes(devAddr, MPU6050_RA_XG_OFFS_USRH, 2, buffer);
2774 return (((int16_t)buffer[0]) << 8) | buffer[1];
2776 void MPU6050::setXGyroOffsetUser(int16_t offset) {
2777 I2Cdev::writeWord(devAddr, MPU6050_RA_XG_OFFS_USRH, offset);
2780 // YG_OFFS_USR* register
2782 int16_t MPU6050::getYGyroOffsetUser() {
2783 I2Cdev::readBytes(devAddr, MPU6050_RA_YG_OFFS_USRH, 2, buffer);
2784 return (((int16_t)buffer[0]) << 8) | buffer[1];
2786 void MPU6050::setYGyroOffsetUser(int16_t offset) {
2787 I2Cdev::writeWord(devAddr, MPU6050_RA_YG_OFFS_USRH, offset);
2790 // ZG_OFFS_USR* register
2792 int16_t MPU6050::getZGyroOffsetUser() {
2793 I2Cdev::readBytes(devAddr, MPU6050_RA_ZG_OFFS_USRH, 2, buffer);
2794 return (((int16_t)buffer[0]) << 8) | buffer[1];
2796 void MPU6050::setZGyroOffsetUser(int16_t offset) {
2797 I2Cdev::writeWord(devAddr, MPU6050_RA_ZG_OFFS_USRH, offset);
2800 // INT_ENABLE register (DMP functions)
2802 bool MPU6050::getIntPLLReadyEnabled() {
2803 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
2806 void MPU6050::setIntPLLReadyEnabled(bool enabled) {
2807 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, enabled);
2809 bool MPU6050::getIntDMPEnabled() {
2810 I2Cdev::readBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
2813 void MPU6050::setIntDMPEnabled(bool enabled) {
2814 I2Cdev::writeBit(devAddr, MPU6050_RA_INT_ENABLE, MPU6050_INTERRUPT_DMP_INT_BIT, enabled);
2819 bool MPU6050::getDMPInt5Status() {
2820 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_5_BIT, buffer);
2823 bool MPU6050::getDMPInt4Status() {
2824 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_4_BIT, buffer);
2827 bool MPU6050::getDMPInt3Status() {
2828 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_3_BIT, buffer);
2831 bool MPU6050::getDMPInt2Status() {
2832 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_2_BIT, buffer);
2835 bool MPU6050::getDMPInt1Status() {
2836 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_1_BIT, buffer);
2839 bool MPU6050::getDMPInt0Status() {
2840 I2Cdev::readBit(devAddr, MPU6050_RA_DMP_INT_STATUS, MPU6050_DMPINT_0_BIT, buffer);
2844 // INT_STATUS register (DMP functions)
2846 bool MPU6050::getIntPLLReadyStatus() {
2847 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_PLL_RDY_INT_BIT, buffer);
2850 bool MPU6050::getIntDMPStatus() {
2851 I2Cdev::readBit(devAddr, MPU6050_RA_INT_STATUS, MPU6050_INTERRUPT_DMP_INT_BIT, buffer);
2855 // USER_CTRL register (DMP functions)
2857 bool MPU6050::getDMPEnabled() {
2858 I2Cdev::readBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, buffer);
2861 void MPU6050::setDMPEnabled(bool enabled) {
2862 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_EN_BIT, enabled);
2864 void MPU6050::resetDMP() {
2865 I2Cdev::writeBit(devAddr, MPU6050_RA_USER_CTRL, MPU6050_USERCTRL_DMP_RESET_BIT, true);
2868 // BANK_SEL register
2870 void MPU6050::setMemoryBank(uint8_t bank, bool prefetchEnabled, bool userBank) {
2872 if (userBank) bank |= 0x20;
2873 if (prefetchEnabled) bank |= 0x40;
2874 I2Cdev::writeByte(devAddr, MPU6050_RA_BANK_SEL, bank);
2877 // MEM_START_ADDR register
2879 void MPU6050::setMemoryStartAddress(uint8_t address) {
2880 I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_START_ADDR, address);
2885 uint8_t MPU6050::readMemoryByte() {
2886 I2Cdev::readByte(devAddr, MPU6050_RA_MEM_R_W, buffer);
2889 void MPU6050::writeMemoryByte(uint8_t data) {
2890 I2Cdev::writeByte(devAddr, MPU6050_RA_MEM_R_W, data);
2892 void MPU6050::readMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address) {
2893 setMemoryBank(bank);
2894 setMemoryStartAddress(address);
2896 for (uint16_t i = 0; i < dataSize;) {
2897 // determine correct chunk size according to bank position and data size
2898 chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
2900 // make sure we don't go past the data size
2901 if (i + chunkSize > dataSize) chunkSize = dataSize - i;
2903 // make sure this chunk doesn't go past the bank boundary (256 bytes)
2904 if (chunkSize > 256 - address) chunkSize = 256 - address;
2906 // read the chunk of data as specified
2907 I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i);
2909 // increase byte index by [chunkSize]
2912 // uint8_t automatically wraps to 0 at 256
2913 address + chunkSize;
2915 // if we aren't done, update bank (if necessary) and address
2917 if (address == 0) bank++;
2918 setMemoryBank(bank);
2919 setMemoryStartAddress(address);
2923 bool MPU6050::writeMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify, bool useProgMem) {
2924 setMemoryBank(bank);
2925 setMemoryStartAddress(address);
2927 uint8_t *verifyBuffer;
2928 uint8_t *progBuffer;
2931 if (verify) verifyBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
2932 if (useProgMem) progBuffer = (uint8_t *)malloc(MPU6050_DMP_MEMORY_CHUNK_SIZE);
2933 for (i = 0; i < dataSize;) {
2934 // determine correct chunk size according to bank position and data size
2935 chunkSize = MPU6050_DMP_MEMORY_CHUNK_SIZE;
2937 // make sure we don't go past the data size
2938 if (i + chunkSize > dataSize) chunkSize = dataSize - i;
2940 // make sure this chunk doesn't go past the bank boundary (256 bytes)
2941 if (chunkSize > 256 - address) chunkSize = 256 - address;
2944 // write the chunk of data as specified
2945 for (j = 0; j < chunkSize; j++) progBuffer[j] = pgm_read_byte(data + i + j);
2946 I2Cdev::writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, progBuffer);
2948 // write the chunk of data as specified
2949 I2Cdev::writeBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, data + i);
2952 // verify data if needed
2953 if (verify && verifyBuffer) {
2954 setMemoryBank(bank);
2955 setMemoryStartAddress(address);
2956 I2Cdev::readBytes(devAddr, MPU6050_RA_MEM_R_W, chunkSize, verifyBuffer);
2957 if (memcmp(data + i, verifyBuffer, chunkSize) != 0) {
2958 Serial.print("Block write verification error, bank ");
2959 Serial.print(bank, DEC);
2960 Serial.print(", address ");
2961 Serial.print(address, DEC);
2962 Serial.print("!\nExpected:");
2963 for (j = 0; j < chunkSize; j++) {
2964 Serial.print(" 0x");
2966 if (progBuffer[j] < 16) Serial.print("0");
2967 Serial.print(progBuffer[j], HEX);
2969 if (data[i + j] < 16) Serial.print("0");
2970 Serial.print(data[i + j], HEX);
2973 Serial.print("\nReceived:");
2974 for (uint8_t j = 0; j < chunkSize; j++) {
2975 Serial.print(" 0x");
2976 if (verifyBuffer[i + j] < 16) Serial.print("0");
2977 Serial.print(verifyBuffer[i + j], HEX);
2981 if (useProgMem) free(progBuffer);
2982 return false; // uh oh.
2986 // increase byte index by [chunkSize]
2989 // uint8_t automatically wraps to 0 at 256
2990 address + chunkSize;
2992 // if we aren't done, update bank (if necessary) and address
2994 if (address == 0) bank++;
2995 setMemoryBank(bank);
2996 setMemoryStartAddress(address);
2999 if (verify) free(verifyBuffer);
3000 if (useProgMem) free(progBuffer);
3003 bool MPU6050::writeProgMemoryBlock(uint8_t *data, uint16_t dataSize, uint8_t bank, uint8_t address, bool verify) {
3004 writeMemoryBlock(data, dataSize, bank, address, verify, true);
3007 // DMP_CFG_1 register
3009 uint8_t MPU6050::getDMPConfig1() {
3010 I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_1, buffer);
3013 void MPU6050::setDMPConfig1(uint8_t config) {
3014 I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_1, config);
3017 // DMP_CFG_2 register
3019 uint8_t MPU6050::getDMPConfig2() {
3020 I2Cdev::readByte(devAddr, MPU6050_RA_DMP_CFG_2, buffer);
3023 void MPU6050::setDMPConfig2(uint8_t config) {
3024 I2Cdev::writeByte(devAddr, MPU6050_RA_DMP_CFG_2, config);